UPD78044F datasheet(31/472 Pages) NEC

31 / 472 page

Chapter 1

Outline (µPD780828A Subseries)

User’s Manual U16504EE1V1UD00

1.7 Block Diagram

Figure 1-3:

Block Diagram

Remark:

The internal ROM and RAM capacity depends on the product.

S16/P97 - S23/P90

S23/P37 - S27/P34

COM0 - COM3

Port 0

LCD

Controller

driver

Standby Control

16-bit Timer TM2

3 x Capture with

Filter

78K/0

CPU

Core

Port 1

Port 2

Port 3

Port 4

Port 5

Port 6

Port 8

TPO21/S21/P92

TI20/P64

TIO50/S27/P34

SCK30/S26/P35

SO30/S25/P36

SI30/S24/P37

Port 9

S0/P47 - S7/P40

S8/P87 - S15/P80

TI21/P65

TI22/S23/P90

8-bit Timer TM50

TIO51/S22/P91

8-bit Timer TM51

8-bit Timer TM52

Watch Timer

Serial Interface

SIO30 3-wire mode

RxD0/P62

TxD0/P63

UART0

PCL/SGOA/P61

Clock Output

Control

A/D Converter

ANI0/P10

-ANI4/P14

AVDD/AVREF

AVSS

Interrupt

Control

INTP0/P00

-INTP2/P02

RAM

DCAN

Interface

RAM

Interface

CRxD

CTxD

System

Control

4.0 V - 5.5 V

RESET

P00 - P03

P10 - P14

P20 - P27

P34 - P37

P40 - P47

P50 - P57

P60 - P65

P80 - P87

P90 - P97

VLCD

SM31/P50 - SM34/P53

SM41/P54 - SM44/P57

Meter

Controller/

Driver

SM11/P20 - SM14/P23

SM21/P24 - SM24/P27

SMVSS

SMVDD

SMVSS

Watchdog Timer

Power Fail

Detector

SGO/SGOF/P60

Sound Generator

Output

ROM

SCK31/S20/P93

SO31/SIO31/S19/P94

SI31/S18/P95

Serial Interface

SIO31

3-wire/2-wire mode

CCLK

UPD78044F Datasheet(PDF) 31 Page - NEC

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