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UPD78044F Datasheet(PDF) 60 Page - NEC |
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UPD78044F Datasheet(HTML) 60 Page - NEC |
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60 / 472 page  60 Chapter 3 CPU Architecture User’s Manual U16504EE1V1UD00 Figure 3-7: Data Memory Addressing of µPD780828A Notes: 1. In the expansion RAM between F000H and F3FFH it is possible to do code execution. 2. In the expansion RAM between F400H and F7DFH it is not possible to do code execution. FFFFH FF00H FEFFH FA80H FA7FH FEE0H FEDFH F000H EFFFH 0000H LCD Display RAM 28 x 4 bits Expansion RAM 480 x 8 bits (shared with DCAN) Special Function Register (SFR) 256 x 8 bits General Registers 32 x 8 bits Internal High-speed RAM 1024 x 8 bits Internal Mask ROM 61440 x 8 bits Not usable Not usable FF20H FF1FH FE20H FA64H FA63H FB00H FAFFH F7E0H F7DFH F600H F5FFH SFR Addressing Register Addressing Short Direct Addressing Direct Addressing Register Indirect Addressing Based Addressing Based Indexed Addressing Expansion RAM 512 x 8 bits Expansion RAM 1024 x 8 bits F400H F3FFH |
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