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UPD78044F Datasheet(PDF) 92 Page - NEC |
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UPD78044F Datasheet(HTML) 92 Page - NEC |
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92 / 472 page  92 Chapter 4 Port Functions User’s Manual U16504EE1V1UD00 4.2.6 Port 5 Port 5 is an 8-bit output port with output latch. P50 to P57 goes into a high-impedance state when the port mode register 5 is set to 1. The dual-function includes meter control PWM output. RESET input sets port 5 to high-impedance state. Figure 4-7 shows a block diagram of port 5. Caution: When port 5 is set to 1, the read back from output latch operation is enabled. When port 5 is set to 0, the read back from output latch operation is disabled. Figure 4-7: P50 to P57 Configurations Remarks: 1. PM : Port mode register 2. RD : Port 5 read signal 3. WR : Port 5 write signal Notes: 1. Set output latch to 0 when dual function shall be applied to output. 2. Disable dual function when the comment of the output latch shall be applied to output. WRPM WRPORT RD P50/SM31 to P53/SM34 P54/SM41 to P57/SM44 Output Latch (P50 to P57) PM50 to PM57 Dual Function Note 1 Note 2 |
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