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UPD78044F Datasheet(PDF) 75 Page - NEC |
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UPD78044F Datasheet(HTML) 75 Page - NEC |
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75 / 472 page  75 Chapter 3 CPU Architecture User’s Manual U16504EE1V1UD00 3.4.2 Register addressing The general register is accessed as an operand. The general register to be accessed is specified with register bank select flags (RBS0 and RBS1) and register specify code (Rn, RPn) in the instruction code. Register addressing is carried out when an instruction with the following operand format is executed. When an 8-bit register is specified, one of the eight registers is specified with 3 bits in the operation code. Operand format ‘r’ and ‘rp’ can be described with function names (X, A, C, B, E, D, L, H, AX, BC, DE and HL) as well as absolute names (R0 to R7 and RP0 to RP3). Description example Figure 3-19: Register Addressing (a) MOV A, C; when selecting C register as r (b) INCW DE; when selecting DE register pair as rp Table 3-7: Register Addressing Identifier Description r X, A, C, B, E, D, L, H rp AX, BC, DE, HL 01100010 Register specify code Operation code 10000100 Register specify code Operation code |
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