UPD78044F datasheet(32/472 Pages) NEC

32 / 472 page

Chapter 1

Outline (µPD780828A Subseries)

User’s Manual U16504EE1V1UD00

1.8 Overview of Functions

Table 1-2:

Overview of Functions

Item

µPD78F0828A

µPD780828A

µPD780826A

µPD780824A

ROM

59.5 Kbytes

Flash EE

60 Kbytes

Mask ROM

48 Kbytes

Mask ROM

32 Kbytes

Mask ROM

Hi-speed RAM

1024 bytes

Expansion RAM

2016 bytes

480 bytes

LCD Display RAM

28 bytes

Memory space

64 Kbytes

General register

8 bits - 32 registers

(8 bit x 8 x 4 bank)

Main system clock

0.25 µs/0.5 µs/1 µs/2 µs/4 µs (at 8 MHz)

Instruction set

• 16-bit operation

• Multiplication/division (8 bits

× 8 bits, 16 bits ÷ 8 bits)

• Bit manipulation (set, reset, test, boolean operation)

• BCD adjustment, etc.

I/O port

59 in total

Input ports: 5

Output ports: 16

I/O ports: 38

A/D converter

8 bit x 5 channels

Serial I/F

3-wire mode: 1 channel

2-wire/3-wire mode: 1 channel

UART: 1 channel

Timer

16 bit timer / event counter: 1 channel

8 bit timer / event counter: 2 channels

8 bit interval timer: 1 channel

Watch timer: 1 channel

Watchdog timer: 1 channel

Timer output

3 outputs (8-bit PWM output

× 2)

Clock output

8 MHz, 4 MHz, 2 MHz, 1 MHz, 500 KHz, 250 KHz, 125 KHz, 62.5 KHz

@fX = 8 MHz

Sound Generator

1 output

LCD

Segment output: 28, Common output: 4

CAN

1 channel

Vectored interrupt

Non-maskable interrupt: 1 (internal)

Maskable interrupt: 20 (internal)

External interrupt: 3

Software interrupt: 1

Operating voltage

range

VDD = 4.0 V to 5.5 V

Package

80-QFP (14

× 14)

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