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UPD78044F Datasheet(PDF) 79 Page - NEC |
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UPD78044F Datasheet(HTML) 79 Page - NEC |
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79 / 472 page  79 Chapter 3 CPU Architecture User’s Manual U16504EE1V1UD00 3.4.6 Register indirect addressing The memory is addressed with the contents of the register pair specified as an operand. The register pair to be accessed is specified with the register bank select flag (RBS0 and RBS1) and the register pair specify code in the instruction code. This addressing can be carried out for all the memory spaces. Operand format Figure 3-23: Register indirect addressing (a) Description example MOV A, [DE]; when selecting [DE] as register pair (b) Illustration Table 3-11: Register indirect addressing Identifier Description - [DE], [HL] Operation code 10000101 16 0 8 D 7 E Memory The contents of addressed memory are transferred Memory address specified by register pair DE 7 A DE 0 0 7 |
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