UPD78044F datasheet(57/472 Pages) NEC

57 / 472 page

Chapter 3

CPU Architecture

User’s Manual U16504EE1V1UD00

3.1.2 Internal data memory space

The µPD780828A Subseries units incorporate the following RAMs.

(1)

Internal high-speed RAM

The 32-byte area FEE0H to FEFF is allocated with four general purpose register banks composed

of eight 8-bit registers.

The internal high-speed RAM has to be used as stack memory.

(2)

LCD-Display RAM

Buffer RAM is allocated to the 28 x 4 bits area from FA64H to FA7FH. LCD-Display RAM can also

be used as normal RAM.

(3)

Internal expansion RAM (including sharing with DCAN)

3.1.3 Special function register (SFR) area

An on-chip peripheral hardware special function register (SFR) is allocated in the area FF00H to

FFFFH. (Refer to Table 3-5, “Special Function Register List,” on page 67).

Caution:

Do not access addresses where the SFR is not assigned.

Table 3-3:

Internal high-speed RAM

Device

Internal High Speed RAM

µPD780824A

1024 x 8 bits (FB00H to FEFFH)

µPD780826A

1024 x 8 bits (FB00H to FEFFH)

µPD780828A

1024 x 8 bits (FB00H to FEFFH)

µPD78F0828A

1024 x 8 bits (FB00H to FEFFH)

Table 3-4:

Internal expansion RAM (including sharing with DCAN)

Device

Internal Expansion RAM

µPD780824A

480 x 8 bits (F600H to F7DFH)

µPD780826A

480 x 8 bits (F600H to F7DFH)

µPD780828A

2016 x 8 bits (F000H to F7DFH)

µPD78F0828A

2016 x 8 bits (F000H to F7DFH)

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