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UPD78044F Datasheet(PDF) 53 Page - NEC |
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UPD78044F Datasheet(HTML) 53 Page - NEC |
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53 / 472 page  53 Chapter 3 CPU Architecture User’s Manual U16504EE1V1UD00 The memory map of the µPD780828A is shown in Figure 3-3. Figure 3-3: Memory Map of the µPD780828A Notes: 1. In the expansion RAM between F000H and F3FFH it is possible to do code execution. 2. In the expansion RAM between F400H and F7DFH it is not possible to do code execution. FFFFH FF00H FEFFH FA80H FA7FH FEE0H FEDFH 0000H EFFFH 1000H 0FFFH 0800H 07FFH 0080H 007FH 0040H 003FH 0000H LCD Display RAM 28 x 4 bits Expansion RAM 480 Bytes (shared with DCAN) Program Area CALLF Entry Area Program Area CALLT Table Area Vector Table Area Special Function Register (SFR) 256 x 8 bits General Registers 32 x 8 bits Internal High-speed RAM 1024 x 8 bits Internal ROM 60 Kbytes Not usable Not usable FF20H FF1FH FE20H FA64H FA63H FAFFH F7E0H F7DFH F600H F5FFH F000H EFFFH Expansion RAM 512 Bytes FB00H Expansion RAM 1024 Bytes F400H F3FFH |
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