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ECE1200 Datasheet(PDF) 45 Page - Microchip Technology |
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ECE1200 Datasheet(HTML) 45 Page - Microchip Technology |
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45 / 87 page ![]() 2018-2021 Microchip Technology Inc. DS00003093C Draft-page 45 ECE1200 6.9.19 POWER SAVE REGISTER Index 2Ah Bits Description Type Default Reset Event 7 OSC_LOCKED ‘1’ in this bit indicates that the on-chip oscillator is locked to the 32KHz SUSCLK input. R - PLTRST 6 FORCE_OSC_LOCK Writing ‘1’ into this bit forces the oscillator output to be used for all activity regardless of whether it is locked. The LPC clocks will be slower than specified if not locked. R/W 0 PLTRST 5 Reserved R 0 - 4 Reserved R 0 - 3 Reserved R 0 - 2 Reserved R 0 - 1 IDLE_GATEOSC A ‘1’ written into this bit will save power by gating off internal clocking to some chip functions whenever they are idle. R/W 0 PLTRST 0 VW_C10_STOPOSC Connected Standby support to save internal power. A ‘1’ written into this bit will enable Deep Sleep Mode to be entered whenever the HOST_C10 Virtual Wire is high while all the device interfaces (eSPI, LPC, SERIRQ and LPC Clocks) are already idle. In Deep Sleep Mode the internal oscillator is turned off. R/W 0 PLTRST |
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