ECE1200 datasheet(47/87 Pages) MICROCHIP

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DS00003093C Draft-page 47

ECE1200

6.10.1

I/O BAR ADDRESS LS REGISTER

This register holds the least-significant half of the I/O address of the Configuration Port used to access the internal reg-

ister set. The I/O address provided here is the address of the INDEX byte, and the DATA byte occupies this address

plus one. Initially these registers select the default locations: INDEX at 008Ch and DATA at 008Dh.

Both of these registers must be written, LS first and then MS, before the new I/O address is used, otherwise unspecified

behavior may result.

Bit[0] of this register must always be written as ‘0’ (expressing an Even address).

6.10.2

I/O BAR ADDRESS MS REGISTER

This register holds the most-significant half of the I/O address of the Configuration Port used to access the internal reg-

ister set. Upon writing this byte, all further accesses must use the newly-written I/O address for the INDEX and DATA

locations.

6.10.3

MAP SERIRQ IRQ1 SLOT REGISTER

6.10.4

MAP SERIRQ IRQ3 SLOT REGISTER

Index

36h of Logical Device 00h

Bits

Description

Type

Default

Reset Event

7:0 I/O Address of the Configuration Port, Least-Significant 8 bits.

The written value is not used internally until the associated MS

R/W

8Ch

PLTRST

Index

37h of Logical Device 00h

Bits

Description

Type

Default

Reset Event

7:0 I/O Address of the Configuration Port, Most-Significant 8 bits.

The new I/O address is used immediately after this register is

written. The LS register must have been written first.

R/W

00h

PLTRST

Index

ACh of Logical Device 00h

Bits

Description

Type

Default

Reset Event

7:0 Programs the eSPI IRQ to be connected to SERIRQ Slot 2.

By default it selects the legacy IRQ1 function.

FFh written in this register disconnects this slot from any IRQ;

otherwise, any IRQ number recognized by the Chipset may be

selected by placing its number here.

R/W

01h

PLTRST

Index

ADh of Logical Device 00h

Bits

Description

Type

Default

Reset Event

7:0 Programs the eSPI IRQ to be connected to SERIRQ Slot 4.

By default it selects the legacy IRQ3 function.

FFh written in this register disconnects this slot from any IRQ;

otherwise, any IRQ number recognized by the Chipset may be

selected by placing its number here.

R/W

03h

PLTRST

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