ECE1200 datasheet(59/87 Pages) MICROCHIP

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DS00003093C Draft-page 59

ECE1200

7.4.2

EXCLUDED PINS

All pins are included in the XNOR chain, except the following:

• Power Pins (VTR_33, VTR_18, VTR_CORE_18)

• Ground Pad (VSS), on underside

• Pin RESETI#, which is the Chip Reset.

• Pin TEST, which is the Test Enable.

• Pins LAD[2:0], which are the Test Mode Selection code.

NOTE that pin LAD3 is still part of the XNOR chain.

• Pin SUSWARN#, which is the XNOR Test Output

• All pins listed as “n/c” in Section 2.2.1, "Pin Assignments, 40-Pin VQFN".

These need not be connected to anything, even for test purposes.

7.4.3

TEST PROCEDURE

7.4.3.1

Setup

Warning: Ensure power supply is off during Setup.

Connect the VSS pad to ground.

Connect the VTR_33, VTR_18 and VTR_CORE_18 pins to their unpowered power source.

Connect the VREF_CPU pin to an unpowered 1.8V power source.

Connect an oscilloscope or voltmeter to the Test Output pin.

All other pins should be pulled to ground.

7.4.3.2

Testing

Turn on the 3.3V power source to VTR_33 pins first.

Turn on the 1.8V power source to the VTR_18 and VTR_CORE_18 pins.

Enable the XNOR Chain as defined in Section 7.4.3.3, "Procedure to Enable the XNOR Chain".

Bring one input pin in the XNOR Chain high. The output on the SUSWARN# pin should toggle within 30ns. Then

individually toggle each of the remaining pins in the chain. Each time a single input pin is toggled either high or

low the SUSWARN# output pin should toggle.

Once the XNOR test is completed, exit the XNOR Chain Test Mode by the following:

a) set pin RESETI# low,

b) remove power to VTR_18 and VTR_CORE_18, then

remove power to VTR_33.

7.4.3.3

Procedure to Enable the XNOR Chain

Perform the following with at least 1 microsecond between steps.

Set the RESETI# pin high.

Set the pins LAD[2:0] to the binary value 001.

Set the TEST pin high.

Bring the pins LAD[2:0] to the binary value 111.

Bring all XNOR input pins (Section 7.4.2) low.

The XNOR output on SUSWARN# should be seen as low.

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