R5F72115D160FPV datasheet(337/1228 Pages) RENESAS

Part #	R5F72115D160FPV

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family

PDF	1228 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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337 / 1228 page

Section 9 Direct Memory Access Controller (DMAC)

Rev. 2.00 May. 08, 2008 Page 313 of 1200

REJ09B0344-0200

Bit

Bit Name

Initial

Value

R/W

Descriptions

R/W

Acknowledge Mode

Specifies whether DACK is output in data read cycle or

in data write cycle in dual address mode.

In single address mode, DACK is always output

regardless of the specification by this bit.

This bit is valid only in CHCR_0 to CHCR_3. This bit is

reserved in CHCR_4 to CHCR_7; it is always read as

0 and the write value should always be 0.

0: DACK output in read cycle (dual address mode)

1: DACK output in write cycle (dual address mode)

R/W

Acknowledge Level

Specifies the DACK (acknowledge) signal output is

high active or low active.

This bit is valid only in CHCR_0 to CHCR_3. This bit is

reserved in CHCR_4 to CHCR_7; it is always read as

0 and the write value should always be 0.

0: Low-active output from DACK

1: High-active output from DACK

R5F72115D160FPV Datasheet(PDF) 337 Page - Renesas Technology Corp