EP4CE40 datasheet(127/488 Pages) ALTERA | Cyclone IV Device Handbook, Volume 1

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EP4CE40 Datasheet(PDF) 127 Page - Altera Corporation

Part #	EP4CE40

Description	Cyclone IV Device Handbook, Volume 1

PDF	488 Pages

Scroll/Zoom	100%

Manufacturer	ALTERA [Altera Corporation]

Direct Link	http://www.altera.com

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EP4CE40 Datasheet(HTML) 127 Page - Altera Corporation

EP4CE40 Datasheet HTML 123Page - Altera Corporation

EP4CE40 Datasheet HTML 124Page - Altera Corporation

EP4CE40 Datasheet HTML 125Page - Altera Corporation

EP4CE40 Datasheet HTML 126Page - Altera Corporation

EP4CE40 Datasheet HTML 127Page - Altera Corporation

EP4CE40 Datasheet HTML 128Page - Altera Corporation

EP4CE40 Datasheet HTML 129Page - Altera Corporation

EP4CE40 Datasheet HTML 130Page - Altera Corporation

EP4CE40 Datasheet HTML 131Page - Altera Corporation

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Each Cyclone IV I/O bank has its own VCCIO pins. Each I/O bank can support only one VCCIO setting from among 1.2, 1.5, 1.8,

2.5, 3.0, or 3.3 V. Any number of supported single-ended or differential standards can be simultaneously supported in a single

I/O bank, as long as they use the same VCCIO levels for input and output pins.

8

1

1

1

1

1

1

2

2

2

2

2

2

1

1

1

4

4

4

4

4

4

4

2

2

2

3

3

3

3

3

Note to Table 6–4:

(1) User I/O pins are used as inputs or outputs; clock input pins are used as inputs only; clock output pins are used as output only.

Table 6–4. Number of VREF Pins Per I/O Bank for Cyclone IV E Devices

(Part 2 of 2)

I/O

Bank

(1)

Table 6–5. Number of VREF Pins Per I/O Bank for Cyclone IV GX Devices

Device

4CGX15

4CGX22

4CGX30

4CGX50

4CGX75

4CGX110

4CGX150

I/O Bank

(1)

3

1

1

1

3

3

3

3

3

4

1

1

1

3

3

3

3

3

5

1

1

1

3

3

3

3

3

6

1

1

1

3

3

3

3

3

7

1

1

1

3

3

3

3

3

8 (2)

1

1

1

3

3

3

3

3

Notes to Table 6–5:

(1) User I/O pins are used as inputs or outputs; clock input pins are used as inputs only; clock output pins are used as output only.

(2) Bank 9 does not have VREF pin. If input pins with VREF I/O standards are used in bank 9 during user mode, it shares the VREF pin in bank 8.

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