ADV7182ABCPZ datasheet(9/102 Pages) AD

9 / 102 page

Data Sheet

ADV7182A

Rev. 0 | Page 9 of 102

ABSOLUTE MAXIMUM RATINGS

Table 5.

Parameter1

Rating

AVDD to GND

2.2 V

DVDD to GND

2.2 V

PVDD to GND

2.2 V

DVDDIO to GND

4 V

PVDD to DVDD

−0.9 V to +0.9 V

AVDD to DVDD

−0.9 V to +0.9 V

Digital Inputs Voltage

GND − 0.3 V to DVDDIO + 0.3 V

Digital Outputs Voltage

GND − 0.3 V to DVDDIO + 0.3 V

Analog Inputs to Ground

GND − 0.3 V to AVDD + 0.3 V

Maximum Junction Temperature

(TJ MAX)

125°C

Storage Temperature Range

−65°C to +150°C

Infrared Reflow Soldering (20 sec)

JEDEC J-STD-020

1 The absolute maximum ratings assume that DGND pins and the exposed

pad of the ADV7182A are connected together to a common ground plane

(GND); this is part of the recommended layout scheme. See the PCB Layout

Recommendations section for more information. The absolute maximum

ratings are stated in relation to this common ground plane.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Careful attention to

PCB thermal design is required.

θJA is the natural convection junction to ambient thermal resistance

measured in a one cubic foot sealed enclosure as per JEDEC

JESD51. ψJT is the junction to top thermal characterization

parameter measured on a standard test board, as per JEDEC

JESD51, allowing the heat generated in the ADV7182A die to

flow normally along preferred thermal conduction paths that more

closely represent the thermal flows in a typical application board.

Table 6. Thermal Resistance

Package

θJA

ψJT

Unit

CP-32-121

39.6

0.86

°C/W

1 JEDEC JESD51 2s2p 4-layer PCB with two signal layers and two buried solid

ground planes (GND), and with via nine thermal vias connecting the

exposed pad to the ground plane (GND).

ESD CAUTION

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