ADV7182ABCPZ datasheet(91/102 Pages) AD

91 / 102 page

Data Sheet

ADV7182A

Rev. 0 | Page 91 of 102

Interrupt/VDP Map

Bit (Shading

Indicates Default

State)

Address Register

Bit Description

7 654 3210 Comments

Notes

0x44

Interrupt Mask 1

(read/write)

SD_LOCK_MSK

Masks SD_LOCK_Q bit

Unmasks SD_LOCK_Q bit

SD_UNLOCK_MSK

Masks SD_UNLOCK_Q bit

Unmasks SD_UNLOCK_Q bit

Reserved

0 0 0

Not used

SD_FR_CHNG_MSK

Masks SD_FR_CHNG_Q bit

Unmasks SD_FR_CHNG_Q bit

MV_PS_CS_MSK

Masks MV_PS_CS_Q bit

Unmasks MV_PS_CS_Q bit

Reserved

Not used

0x45

Raw Status 2

(read only)

CCAPD

No CCAPD data detected—

VBI System 2

These bits are status bits only;

they cannot be cleared or

masked; Register 0x46 is used

for this purpose

CCAPD data detected—

VBI System 2

Reserved

x x x

EVEN_FIELD

Current SD field is odd

numbered

Current SD field is even

numbered

CHX_MIN_MAX_INTRQ

If the input to the ADC is

within the correct range this

is 0

If the input to the ADC is

outside the range this is set

to 1. The range is set by User

Sub Map 2

Reserved

Not used

MPU_STIM_INTRQ

MPU_STIM_INTRQ = 0

MPU_STIM_INTRQ = 1

0x46

Interrupt Status 2

(read only)

CCAPD_Q

Closed captioning not

detected in the input video

signal—VBI System 2

These bits can be cleared or

masked by Register 0x47 and

that the interrupt in Register

0x46 for the CCAP, CGMS, and

WSS data uses the Mode 1 data

slicer

Closed captioning data

detected in the video input

signal—VBI System 2

Reserved

Not used

Reserved

x x

Not used

SD_FIELD_CHNGD_Q

SD signal has not changed

field from odd to even or vice

versa

SD signal has changed field

from odd to even or vice

versa

Reserved

x x

Not used

MPU_STIM_INTRQ_Q

Manual interrupt not set

Manual interrupt set

0x47

Interrupt Clear 2

(write only)

CCAPD_CLR

Do not clear—VBI System 2

Note that interrupt in

CGMS, and WSS data uses the

Mode 1 data slicer

Clears CCAPD_Q bit—VBI

System 2

Reserved

Not used

Reserved

x x

SD_FIELD_CHNGD_CLR

Do not clear

Clears SD_FIELD_CHNGD_

Q bit

CHX_MIN_MAX_INTRQ_CLR

Do not clear

Clears CHX_MIN_MAX_

INTRQ bit

Reserved

Not used

ADV7182ABCPZ Datasheet(PDF) 91 Page - Analog Devices

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