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ADV7182ABCPZ Datasheet(PDF) 11 Page - Analog Devices

Part # ADV7182ABCPZ
Description  10-Bit, SDTV Video Decoder with Differential Inputs
PDF  102 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7182ABCPZ Datasheet(HTML) 11 Page - Analog Devices

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Data Sheet
ADV7182A
Rev. 0 | Page 11 of 102
THEORY OF OPERATION
The ADV7182A is a versatile, multiformat video decoder that
automatically detects standard analog baseband video signals
and converts them into a YCbCr 4:2:2 component video data
stream. The ADV7182A supports video signals compatible with
worldwide NTSC, PAL, and SECAM standards.
The analog front end (AFE) of the ADV7182A features a 4-channel
input mux, a differential to single-ended converter, and a single
10-bit ADC. The analog video inputs accept single-ended, pseudo
differential, and fully differential composite video signals, as well as
S-Video and YPbPr video signals, supporting a wide range of
consumer and automotive video sources, making the ADV7182A
ideal for automotive, industrial, and consumer applications.
The ADV7182A converts these analog video formats into a
digital 8-bit ITU-R BT.656 video stream. External HS, VS, and
FIELD signals provide timing references for liquid crystal display
(LCD) controllers and other video application specific
integrated circuits (ASICs).
The digital video output stream of the ADV7182A interfaces
easily to a wide range of mobile video processors, MPEG
encoders, codecs, and Analog Devices digital video encoders,
such as the ADV7391.
The ADV7182A is programmed via a 2-wire, serial bidirectional
port (I2C compatible) and can communicate with other devices
using the hardware interrupt pin.
The ADV7182A is fabricated in a low power, 1.8 V CMOS
process. The device is provided in a space-saving, LFCSP,
surface-mount, RoHS compliant package. The ADV7182A is
available in an automotive grade rated over the −40°C to +105°C
temperature range, making the ADV7182A ideal for automotive
applications. The ADV7182A is also available in a −40°C to
+85°C temperature range, making it ideal for consumer or
industrial applications.
ANALOG FRONT END (AFE)
The ADV7182A AFE is comprised of a 4-channel input mux, a
differential to single-ended converter with clamp circuitry, a set
of four antialiasing filters, and a single 10-bit ADC.
The 4-channel input mux enables multiple composite video signals
to be applied to the ADV7182A and is software controlled.
The next stage in the AFE features the differential to single-
ended converter and the clamp circuitry. The incorporation of a
differential front end allows differential video to be connected
directly to the ADV7182A. The differential front end enables
small and large signal noise rejection, improved electromagnetic
interference (EMI), and the ability to absorb ground bounce.
The architecture can support true differential, pseudo differential,
and single-ended signals.
In conjunction with an external resistor divider, the ADV7182A
provides a common-mode input range of 4 V, facilitating in the
removal of large signal, common-mode transients present on
both video inputs. CMR values of up to 80 dB can be achieved
without the need for external amplifier circuitry.
The external resistor divider is required before each analog
input channel to ensure that the input signal is kept within the
range of the ADC (see Figure 23). Current and voltage clamps
in the circuit attempt to ensure that the video signal remains
within the range on the ADC.
The single 10-bit ADC digitizes the analog video before it is
applied to the SDP. Table 8 shows the three ADC clocking rates
determined by the video input format to be processed. These clock
rates ensure 4× oversampling per channel for CVBS, S-Video, and
YPrPb modes.
Table 8. ADC Clock Rates
Input Format
ADC Clock Rate (MHz)1
Oversampling
Rate per Channel
CVBS
57.27
4×
S-Video (Y/C)2
114
4×
YPrPb2
172
4×
1 Based on a 28.63636 MHz clock input to the ADV7182A.
2 See INSEL[4:0] in Table 96 for writes needed to set S-Video (Y/C) and YPrPb
modes.
STANDARD DEFINITION PROCESSOR
The SDP in the ADV7182A is capable of decoding a large
selection of baseband video signals in composite (both single-
ended and differential), S-Video, and component formats. The
video standards supported by the video processor include PAL B/
PAL D/PAL I/PAL G/PAL H, PAL 60, PAL M, PAL N, PAL Nc,
NTSC M/NTSC J, NTSC 4.43, and SECAM B/SECAM D/
SECAM G/SECAM K/SECAM L. The ADV7182A can automatic-
ally detect the video standard and process it accordingly.
The ADV7182A features a five-line, superadaptive, 2D comb filter
that provides superior chrominance and luminance separation
when decoding a composite video signal. This highly adaptive
filter automatically adjusts the processing mode according to
the video standard and signal quality without requiring user
intervention. Video user controls, such as brightness, contrast,
saturation, and hue, are also available in the ADV7182A.
The ADV7182A implements a patented Adaptive Digital Line
Length Tracking (ADLLT™) algorithm to track varying video
line lengths from sources such as a VCR. ADLLT enables the
ADV7182A to track and decode poor quality video sources,
such as VCRs and noisy sources from tuner outputs, VCD players,
and camcorders. The ADV7182A contains a chroma transient
improvement (CTI) processor that sharpens the edge rate of
chroma transitions, resulting in sharper vertical transitions.



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