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R5F72115D160FPV Datasheet(PDF) 158 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 158 Page - Renesas Technology Corp |
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158 / 1228 page ![]() Section 6 Interrupt Controller (INTC) Rev. 2.00 May. 08, 2008 Page 134 of 1200 REJ09B0344-0200 F 2 Icyc + 3 Bcyc + 1 Pcyc 1 Icyc + m1 + m2 + 2(m4) m1 m2 m3 2 Icyc + 17(m4) IRQ RESBANK instruction D E MMM M MM W DE E M M M F D m4 m4 [Legend] m1: m2: m3: m4: Vector address read Saving of SR (stack) Saving of PC (stack) Restoration of banked registers Interrupt acceptance First instruction in interrupt exception service routine Instruction (instruction replacing interrupt exception handling) ... ... ... Figure 6.9 Example of Pipeline Operation when Interrupt is Accepted during RESBANK Instruction Execution (Register Banking with Register Bank Overflow) |
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