R5F72115D160FPV datasheet(156/1228 Pages) RENESAS

Part #	R5F72115D160FPV

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family

PDF	1228 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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156 / 1228 page

Section 6 Interrupt Controller (INTC)

Rev. 2.00 May. 08, 2008 Page 132 of 1200

REJ09B0344-0200

2 Icyc + 3 Bcyc + 1 Pcyc

1 Icyc + m1 + 2(m2) + m3

3 Icyc + m1

IRQ

[Legend]

m1:

m2:

m3:

Vector address read

Saving of SR (stack)

Saving of PC (stack)

Interrupt acceptance

Multiple interrupt acceptance

First instruction in interrupt exception

service routine

First instruction in multiple interrupt

exception service routine

Figure 6.5 Example of Pipeline Operation for Multiple Interrupts

(No Register Banking)

2 Icyc + 3 Bcyc + 1 Pcyc

3 Icyc

3 Icyc + m1 + m2

IRQ

MMM

[Legend]

m1:

m2:

m3:

Vector address read

Saving of SR (stack)

Saving of PC (stack)

Interrupt acceptance

First instruction in interrupt exception

service routine

Instruction (instruction replacing

interrupt exception handling)

Figure 6.6 Example of Pipeline Operation when IRQ Interrupt is Accepted

(Register Banking without Register Bank Overflow)

R5F72115D160FPV Datasheet(PDF) 156 Page - Renesas Technology Corp

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