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R5F72115D160FPV Datasheet(PDF) 152 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 152 Page - Renesas Technology Corp |
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152 / 1228 page ![]() Section 6 Interrupt Controller (INTC) Rev. 2.00 May. 08, 2008 Page 128 of 1200 REJ09B0344-0200 6.6.2 Stack after Interrupt Exception Handling Figure 6.3 shows the stack after interrupt exception handling. Address SP*2 4n – 8 PC*1 SR 4n – 4 4n 32 bits 32 bits Notes: 1. PC: Start address of the next instruction (return destination instruction) after the executed instruction 2. Always make sure that SP is a multiple of 4. Figure 6.3 Stack after Interrupt Exception Handling |
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