3819 datasheet(40/218 Pages) RENESAS

40 / 218 page

3819 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS

(1) Serial I/O Ordinary Mode

Either an internal clock or an external clock can be selected

as the synchronous clock for serial I/O transfer. A dedicated

divider is built in as the internal clock for selecting of 6 clocks.

If internal clock is selected, transfer starts with a write signal

to a serial I/O register (addresses 001B16, 001F16, or

002616). After 8 bits have been transferred, the SOUT pin goes

to high impedance state.

If external clock is selected, control the clock externally be-

cause the contents of the serial I/O register continue to shift

during inputting the transfer clock. In this case, note that the

SOUT pin does not go to high impedance state at the comple-

tion of data transfer.

The interrupt request bit is set at the completion of the trans-

fer of 8 bits, regardless of whether the internal or external

clock is selected.

Fig. 15 Serial I/O timing in the serial I/O ordinary mode (for LSB first)

(2) Serial I/O Automatic Transfer Mode

The serial I/O1 has the automatic transfer function. For auto-

matic transfer, switch to the automatic transfer mode by

setting the serial I/O automatic transfer control register (ad-

dress 001A16).

The following memory spaces and registers used to enable

automatic transfer mode:

• 32-byte serial I/O automatic transfer RAM

• A serial I/O automatic transfer control register

• A serial I/O automatic transfer interval register

• A serial I/O automatic transfer data pointer

When using serial I/O automatic transfer, set the serial I/O1

control register (address 001916) in the same way as the se-

rial I/O ordinary mode. However, note that when external

clock is selected, port P67 becomes the CS input pin by set-

ting the bit 4 (the SRDY1 output selection bit ) of the serial I/O1

control register to “1”.

Serial I/O Automatic Transfer Control Register

(SIOAC) 001A16

The serial I/O automatic transfer control register (address 001A16)

consists of 4 bits which control automatic transfer.

Fig. 16 Structure of serial I/O automatic transfer control register

Synchronous

clock

Interrupt request bit set

If internal clock is selected, the SOUT pin goes to high impedance state

at the completion of data transfer.

Note :

(Note)

Transfer clock

Serial I/O register

write signal

Serial I/O output

SOUT

Serial I/O input

SIN

Receive enable

signal

SRDY

Automatic transfer control bit

0 : Serial I/O ordinary mode

(serial I/O1 interrupt)

1 : Automatic transfer mode

(serial I/O1 automatic transfer interrupt)

Automatic transfer start bit

0 : Transfer completion

1 : Transferring(starts by writing “1”)

Transfer mode switch bit

0 : Fullduplex(transmit and receive)

mode

1 : Transmit-only mode

Synchronous clock output

pin selection bit

0 : SCLK11

1 : SCLK12

Not used (return “0” when read)

Serial I/O automatic transfer control register

(SIOAC : address 001A16)

3819 Datasheet(PDF) 40 Page - Renesas Technology Corp

3819 Datasheet(HTML) 40 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL