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3819 Datasheet(PDF) 127 Page - Renesas Technology Corp |
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3819 Datasheet(HTML) 127 Page - Renesas Technology Corp |
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127 / 218 page  113 3819 Group USER’S MANUAL 2. APPLICATION MITSUBISHI MICROCOMPUTER 3819 Group 2.5 FLD controller Fig. 2.5.7 Structure of FLD data pointer Fig. 2.5.8 Structure of FLD data pointer reload register FLD data pointer reload register b7 b6 b5 b4 b3 b2 b1 b0 B Function At reset RW 0 1 2 3 4 FLD data pointer reload register (FLDDP) [Address:38 16] Indicate the first digit address of the high-order segment. ? ? ? ? ? Nothing is allocated for this bit. This is a write disabled bit. ? 7 ! ! ! ! ! ! ! ! 5 ? ! 6 ? FLD data pointer b7 b6 b5 b4 b3 b2 b1 b0 B Function At reset RW 0 1 2 3 4 FLD data pointer (FLDDP) [Address:38 16] Indicate the address of data which is transfered to the segment of the FLD automatic display RAM. ? ? ? ? ? Nothing is allocated for this bit. This is a write disabled bit. When this bit is read out, the value is "0." 0 7 ! 5 ? ! ! ! ! ! ! 6 ? ! |
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