EP4CE40 datasheet(136/488 Pages) ALTERA

136 / 488 page

6–30

Chapter 6: I/O Features in Cyclone IV Devices

High-Speed I/O Standards Support

Cyclone IV Device Handbook,

May 2013

Altera Corporation

Volume 1

Designing with LVDS

Cyclone IV I/O banks support the LVDS I/O standard. The Cyclone IV GX right I/O

banks support true LVDS transmitters while the Cyclone IV E left and right I/O banks

support true LVDS transmitters. On the top and bottom I/O banks, the emulated

LVDS transmitters are supported using two single-ended output buffers with external

resistors. One of the single-ended output buffers is programmed to have opposite

polarity. The LVDS receiver requires an external 100-

Ω termination resistor between

the two signals at the input buffer.

Figure 6–12 shows a point-to-point LVDS interface using Cyclone IV devices true

LVDS output and input buffers.

Figure 6–13 shows a point-to-point LVDS interface with Cyclone IV devices LVDS

using two single-ended output buffers and external resistors.

BLVDS I/O Standard Support in Cyclone IV Devices

The BLVDS I/O standard is a high-speed differential data transmission technology

that extends the benefits of standard point-to-point LVDS to multipoint configuration

that supports bidirectional half-duplex communication. BLVDS differs from standard

LVDS by providing a higher drive to achieve similar signal swings at the receiver

while loaded with two terminations at both ends of the bus.

Figure 6–12. Cyclone IV Devices LVDS Interface with True Output Buffer on the Right I/O Banks

Transmitting Device

Cyclone IV Device

100

Cyclone IV

Device

Family Logic

Array

100

Input Buffer

Output Buffer

Receiving Device

txout +

txout -

rxin +

rxin -

txout +

txout -

rxin +

rxin -

Figure 6–13. LVDS Interface with External Resistor Network on the Top and Bottom I/O Banks

(1)

Note to Figure 6–13:

(1) RS = 120

Ω. RP = 170 Ω.

LVDS Receiver

100

Cyclone IV Device

Resistor Network

Emulated

LVDS Transmitter

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