EP4CE40 datasheet(176/488 Pages) ALTERA

176 / 488 page

8–12

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices

Configuration

Cyclone IV Device Handbook,

May 2013

Altera Corporation

Volume 1

devices. The internal oscillator is designed to ensure that its maximum frequency is

guaranteed to meet EPCS device specifications. Cyclone IV devices offer the option to

select CLKUSR as the external clock source for DCLK. You can change the clock source

option in the Quartus II software in the Configuration tab of the Device and Pin

Options

dialog box.

1 EPCS1 does not support Cyclone IV devices because of its insufficient memory

capacity.

In configuration mode, the Cyclone IV device enables the serial configuration device

by driving the nCSO output pin low, which connects to the nCS pin of the configuration

device. The Cyclone IV device uses the DCLK and DATA[1]pins to send operation

commands and read address signals to the serial configuration device. The

configuration device provides data on its DATA pin, which connects to the DATA[0]

input of the Cyclone IV device.

All AS configuration pins (DATA[0], DCLK, nCSO, and DATA[1]) have weak internal pull-

up resistors that are always active. After configuration, these pins are set as input tri-

stated and are driven high by the weak internal pull-up resistors.

The timing parameters for AS mode are not listed here because the tCF2CD, tCF2ST0, tCFG,

tSTATUS, tCF2ST1, and tCD2UM timing parameters are identical to the timing parameters

for PS mode shown in Table 8–12 on page 8–36.

Table 8–6. AS DCLK Output Frequency

Oscillator

Minimum

Typical

Maximum

Unit

40 MHz

MHz

EP4CE40 Datasheet(PDF) 176 Page - Altera Corporation