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EP4CE40 Datasheet(PDF) 189 Page - Altera Corporation

Part # EP4CE40
Description  Cyclone IV Device Handbook, Volume 1
PDF  488 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP4CE40 Datasheet(HTML) 189 Page - Altera Corporation

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Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
8–25
Configuration
May 2013
Altera Corporation
Cyclone IV Device Handbook,
Volume 1
1 There are no series resistors required in AP configuration mode for Cyclone IV E
devices when using the Micron flash at 2.5-, 3.0-, and 3.3-V I/O standard. The output
buffer of the Micron P30 IBIS model does not overshoot above 4.1 V. Thus, series
resistors are not required for the 2.5-, 3.0-, and 3.3-V AP configuration option.
However, if there are any other devices sharing the same flash I/Os with Cyclone IV E
devices, all shared pins are still subject to the 4.1-V limit and may require series
resistors.
Default read mode of the supported parallel flash memory and all writes to the
parallel flash memory are asynchronous. Both the parallel flash families support a
synchronous read mode, with data supplied on the positive edge of DCLK.
The serial clock (DCLK) generated by Cyclone IV E devices controls the entire
configuration cycle and provides timing for the parallel interface.
Multi-Device AP Configuration
You can configure multiple Cyclone IV E devices using a single parallel flash. You can
cascade multiple Cyclone IV E devices using the chip-enable (nCE) and
chip-enable-out (nCEO) pins. The first device in the chain must have its nCE pin
connected to GND. You must connect its nCEO pin to the nCE pin of the next device in
the chain. Use an external 10-k
Ω pull-up resistor to pull the nCEO signal high to its
VCCIO level to help the internal weak pull-up resistor. When the first device captures
all its configuration data from the bitstream, it drives the nCEO pin low, enabling the
next device in the chain. You can leave the nCEO pin of the last device unconnected or
use it as a user I/O pin after configuration if the last device in the chain is a
Cyclone IV E device. The nCONFIG, nSTATUS, CONF_DONE, DCLK, DATA[15..8], and
DATA[7..0]
pins of each device in the chain are connected (Figure 8–8 on page 8–26
and Figure 8–9 on page 8–27).
The first Cyclone IV E device in the chain, as shown in Figure 8–8 on page 8–26 and
Figure 8–9 on page 8–27, is the configuration master device and controls the
configuration of the entire chain. You must connect its MSEL pins to select the AP
configuration scheme. The remaining Cyclone IV E devices are used as configuration
slaves. You must connect their MSEL pins to select the FPP configuration scheme. Any
other Altera device that supports FPP configuration can also be part of the chain as a
configuration slave.
The following are the configurations for the DATA[15..0] bus in a multi-device AP
configuration:
■
Byte-wide multi-device AP configuration
■
Word-wide multi-device AP configuration



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