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UM0434 Datasheet(PDF) 105 Page - STMicroelectronics |
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UM0434 Datasheet(HTML) 105 Page - STMicroelectronics |
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105 / 390 page ![]() Register model UM0434 106/391 4.19.4 Parallel signature low register (PSLR) PSLR, shown in Table 4.19.5, provides signature information for the low word (bits 31-0) of the AHB data read and data write buses. Writing PSLR initializes a seed value prior to enabling signature accumulation. PSCR[INIT] can also be used to clear the PSLR. PSLR is unaffected by system reset, thus should be initialized by software prior to performing parallel signature operations. 4.19.5 Parallel signature counter register (PSCTR) PSCTR, shown in Table 4.19.6, provides count information for signature accumulation. It is incremented on every accumulated transfer or on an mtdcr psulr,rS. Writing to PSCTR initializes a value before enabling signature accumulation. PSCR[INIT] can also be used to clear PSCTR. PSCTR is unaffected by system reset, thus should be initialized by software before performing parallel signature operations. . 4.19.6 Parallel signature update high register (PSUHR) PSUHR, shown in Table 98, updates the high signature value via software. It can be written via an mtdcr psuhr, rS instruction to cause signature accumulation to occur in the PSHR using the data value written. Writing to this register does not cause the PSCTR to increment. Table 95. Parallel signature high register (PSHR) 32 63 Field High signature Reset Unaffected R/W R/W DCR DCR 274 Table 96. Parallel signature low register (PSLR) 32 63 Field Low signature Reset Unaffected R/W R/W DCR DCR 275 Table 97. Parallel signature counter register (PSCTR) 32 63 Field Counter Reset Unaffected R/W R/W DCR DCR 276 |
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