TMS320F2810PBKA datasheet(29/173 Pages) TI

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Transmission Line

4.0 pF

1.85 pF

Z0 = 50 W

(A)

Tester Pin Electronics

Data Sheet Timing Reference Point

Output

Under

Test

42 W

3.5 nH

Device Pin

(A)

TMS320F2810, TMS320F2811, TMS320F2812

www.ti.com

SPRS174U – APRIL 2001 – REVISED JULY 2019

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Product Folder Links: TMS320F2810 TMS320F2811 TMS320F2812

Specifications

5.12 Timing and Switching Characteristics

5.12.1 Timing Parameter Symbology

Timing parameter symbols used are created in accordance with JEDEC Standard 100. To shorten the

symbols, some of the pin names and other related terminology have been abbreviated as follows:

Lowercase subscripts and their

meanings:

Letters and symbols and their

meanings:

access time

High

cycle time (period)

Low

delay time

Valid

fall time

Unknown, changing, or don't care

level

hold time

High impedance

rise time

setup time

transition time

valid time

pulse duration (width)

5.12.1.1 General Notes on Timing Parameters

All output signals from the 28x devices (including XCLKOUT) are derived from an internal clock such that

all output transitions for a given half-cycle occur with a minimum of skewing relative to each other.

The signal combinations shown in the following timing diagrams may not necessarily represent actual

cycles. For actual cycle examples, see the appropriate cycle description section of this document.

5.12.1.2 Test Load Circuit

This test load circuit is used to measure all switching characteristics provided in this document.

The data sheet provides timing at the device pin. For output timing analysis, the tester pin electronics and its

transmission line effects must be taken into account. A transmission line with a delay of 2 ns or longer can be used to

produce the desired transmission line effect. The transmission line is intended as a load only. It is not necessary to

add or subtract the transmission line delay (2 ns or longer) from the data sheet timing.

Input requirements in this data sheet are tested with an input slew rate of < 4 Volts per nanosecond (4 V/ns) at the

device pin.

Figure 5-3. 3.3-V Test Load Circuit

TMS320F2810PBKA Datasheet(PDF) 29 Page - Texas Instruments

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