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TMS320F2810PBKA Datasheet(PDF) 90 Page - Texas Instruments

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Part # TMS320F2810PBKA
Description  TMS320F281x Digital Signal Processors
PDF  173 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F2810PBKA Datasheet(HTML) 90 Page - Texas Instruments

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TMS320F2810, TMS320F2811, TMS320F2812
SPRS174U – APRIL 2001 – REVISED JULY 2019
www.ti.com
Submit Documentation Feedback
Product Folder Links: TMS320F2810 TMS320F2811 TMS320F2812
Detailed Description
Copyright © 2001–2019, Texas Instruments Incorporated
(1)
Extra care must be taken due to any effect toggling SPICLK to select a boot mode may have on external logic.
(2)
If the boot mode selected is Flash, H0, or OTP, then no external code is loaded by the bootloader.
(3)
PU = pin has an internal pullup. No PU = pin does not have an internal pullup.
6.1.8
L0, L1, H0 SARAMs
The F281x contains an additional 16K x 16 of single-access RAM, divided into three blocks (4K + 4K +
8K). Each block can be independently accessed hence minimizing pipeline stalls. Each block is mapped to
both program and data space.
6.1.9
Boot ROM
The Boot ROM is factory-programmed with boot-loading software. The Boot ROM program executes after
device reset and checks several GPIO pins to determine which boot mode to enter. For example, the user
can select to execute code already present in the internal Flash or download new software to internal
RAM through one of several serial ports. Other boot modes exist as well. The Boot ROM also contains
standard tables, such as SIN/COS waveforms, for use in math-related algorithms. Table 6-1 shows the
details of how various boot modes may be invoked. See the TMS320x281x DSP Boot ROM Reference
Guide, for more information.
Table 6-1. Boot Mode Selection(1)(2)
BOOT MODE SELECTED
GPIOF4
(SCITXDA)
GPIOF12
(MDXA)
GPIOF3
(SPISTEA)
GPIOF2
(SPICLK)
GPIO PU status(3)
PU
No PU
No PU
No PU
Jump to Flash address 0x3F 7FF6.
A branch instruction must have been programmed here prior to
reset to re-direct code execution as desired.
1
x
x
x
Call SPI_Boot to load from an external serial SPI EEPROM
0
1
x
x
Call SCI_Boot to load from SCI-A
0
0
1
1
Jump to H0 SARAM address 0x3F 8000
0
0
1
0
Jump to OTP address 0x3D 7800
0
0
0
1
Call Parallel_Boot to load from GPIO Port B
0
0
0
0



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