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TMS320F2810PBKA Datasheet(PDF) 37 Page - Texas Instruments

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Part # TMS320F2810PBKA
Description  TMS320F281x Digital Signal Processors
PDF  173 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F2810PBKA Datasheet(HTML) 37 Page - Texas Instruments

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TMS320F2810, TMS320F2811, TMS320F2812
www.ti.com
SPRS174U – APRIL 2001 – REVISED JULY 2019
Submit Documentation Feedback
Product Folder Links: TMS320F2810 TMS320F2811 TMS320F2812
Specifications
Copyright © 2001–2019, Texas Instruments Incorporated
5.12.4 Clock Specifications
5.12.4.1 Device Clock Table
This section provides the timing requirements and switching characteristics for the various clock options
available on the F281x DSPs. Table 5-4 lists the cycle times of various clocks.
(1)
This is the default reset value if SYSCLKOUT = 150 MHz.
(2)
The maximum value for ADCCLK frequency is 25 MHz. For SYSCLKOUT values of 25 MHz or lower, ADCCLK has to be
SYSCLKOUT/2 or lower. ADCCLK = SYSCLKOUT is not a valid mode for any value of SYSCLKOUT.
Table 5-4. Clock Table and Nomenclature
MIN
NOM
MAX
UNIT
On chip oscillator clock
tc(OSC), Cycle time
28.6
50
ns
Frequency
20
35
MHz
XCLKIN
tc(CI), Cycle time
6.67
250
ns
Frequency
4
150
MHz
SYSCLKOUT
tc(SCO), Cycle time
6.67
500
ns
Frequency
2
150
MHz
XCLKOUT
tc(XCO), Cycle time
6.67
2000
ns
Frequency
0.5
150
MHz
HSPCLK
tc(HCO), Cycle time
6.67
13.3(1)
ns
Frequency
75(1)
150
MHz
LSPCLK
tc(LCO), Cycle time
13.3
26.6(1)
ns
Frequency
37.5(1)
75
MHz
ADC clock
tc(ADCCLK), Cycle time
(2)
40
ns
Frequency
25
MHz
SPI clock
tc(SPC), Cycle time
50
ns
Frequency
20
MHz
McBSP
tc(CKG), Cycle time
50
ns
Frequency
20
MHz
XTIMCLK
tc(XTIM), Cycle time
6.67
ns
Frequency
150
MHz



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