TMS320F2810PBKA datasheet(46/173 Pages) TI

46 / 173 page

TMS320F2810, TMS320F2811, TMS320F2812

SPRS174U – APRIL 2001 – REVISED JULY 2019

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Specifications

(1)

QUALSTDBY is a 6-bit field in the LPMCR0 register.

Table 5-18. STANDBY Mode Timing Requirements

MIN

MAX

UNIT

tw(WAKE-INT)

Pulse duration, external wake-up

signal

Without input qualifier

12tc(CI)

cycles

With input qualifier

(2 + QUALSTDBY) * tc(CI)

(1)

This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. Execution of an ISR (triggered

by the wake-up) signal involves additional latency.

Table 5-19. STANDBY Mode Switching Characteristics

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

td(IDLE-XCOH)

Delay time, IDLE instruction

executed to XCLKOUT high

32tc(SCO)

45tc(SCO)

cycles

td(WAKE-STBY)

Delay time, external wake signal to program execution

resume(1)

•

Wake-up from Flash

–

Flash module in active

state

Without input qualifier

12tc(CI)

cycles

With input qualifier

12tc(CI) + tw(WAKE-INT)

•

Wake-up from Flash

–

Flash module in sleep

state

Without input qualifier

1125tc(SCO)

cycles

With input qualifier

1125tc(SCO) + tw(WAKE-INT)

•

Wake-up from SARAM

Without input qualifier

12tc(CI)

cycles

With input qualifier

12tc(CI) + tw(WAKE-INT)

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