TMS320F2810PBKA datasheet(30/173 Pages) TI

30 / 173 page

0.8 V (V )

2.0 V (V )

0.4 V (V

)

2.4 V (V

)

TMS320F2810, TMS320F2811, TMS320F2812

SPRS174U – APRIL 2001 – REVISED JULY 2019

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Specifications

5.12.1.3 Signal Transition Levels

Note that some of the signals use different reference voltages, see the recommended operating conditions

table. Output levels are driven to a minimum logic-high level of 2.4 V and to a maximum logic-low level of

0.4 V.

Figure 5-4 shows output levels.

Figure 5-4. Output Levels

Output transition times are specified as follows:

•

For a high-to-low transition, the level at which the output is said to be no longer high is below VOH(MIN)

and the level at which the output is said to be low is VOL(MAX) and lower.

•

For a low-to-high transition, the level at which the output is said to be no longer low is above VOL(MAX)

and the level at which the output is said to be high is VOH(MIN) and higher.

Figure 5-5 shows the input levels.

Figure 5-5. Input Levels

Input transition times are specified as follows:

•

For a high-to-low transition on an input signal, the level at which the input is said to be no longer high

is below VIH(MIN) and the level at which the input is said to be low is VIL(MAX) and lower.

•

For a low-to-high transition on an input signal, the level at which the input is said to be no longer low is

above VIL(MAX) and the level at which the input is said to be high is VIH(MIN) and higher.

NOTE

See the individual timing diagrams for levels used for testing timing parameters.

TMS320F2810PBKA Datasheet(PDF) 30 Page - Texas Instruments