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TMS320F2810PBKA Datasheet(PDF) 5 Page - Texas Instruments |
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TMS320F2810PBKA Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 173 page ![]() 5 TMS320F2810, TMS320F2811, TMS320F2812 www.ti.com SPRS174U – APRIL 2001 – REVISED JULY 2019 Submit Documentation Feedback Product Folder Links: TMS320F2810 TMS320F2811 TMS320F2812 Revision History Copyright © 2001–2019, Texas Instruments Incorporated 2 Revision History Changes from May 31, 2012 to July 12, 2019 (from T Revision (May 2012) to U Revision) Page • Global: Removed ROM devices (TMS320C2810, TMS320C2811, TMS320C2812). Removed C281x/ROM data. .... 1 • Global: Restructured document. .................................................................................................. 1 • Global: Changed "Q100" to "AEC-Q100". ........................................................................................ 1 • Section 1.1 (Features): Updated "Clock and system control" feature. ......................................................... 1 • Section 1.1: Updated Q temperature option. Changed "[Q100 Qualification]" to "(AEC-Q100 qualification for automotive applications)". ........................................................................................................... 1 • Section 1.2 (Applications): Added section. ....................................................................................... 2 • Section 1.3 (Description): Added Device Information table. .................................................................... 2 • Section 1.4 (Functional Block Diagram): Added section title. .................................................................. 3 • Figure 1-1 (Functional Block Diagram): Removed ROM. Updated footnotes. ............................................... 3 • Section 3 (Device Comparison): Changed section title from "Device Summary" to "Device Comparison". ............. 7 • Table 3-1 (Device Comparison): Changed table title from "Hardware Features" to "Device Comparison". .............. 7 • Table 3-1: Removed C2810, C2811, and C2812 data. .......................................................................... 7 • Table 3-1: Removed "Product Status" row and its associated footnote. ..................................................... 7 • Section 3.1 (Related Products): Added section. .................................................................................. 8 • Section 4 (Terminal Configuration and Functions): Changed section title from "Introduction" to "Terminal Configuration and Functions". ....................................................................................................... 9 • Section 4.1 (Pin Diagrams): Changed section title from "Pin Assignments" to "Pin Diagrams". ........................... 9 • Table 4-1 (Signal Descriptions): Updated DESCRIPTION of XRS. .......................................................... 12 • Table 4-1: Removed C281x/ROM data from DESCRIPTION of TEST1, TEST2, and VDD3VFL............................ 12 • Section 5 (Specifications): Changed section title from "Electrical Specifications" to "Specifications". .................. 21 • Section 5.1 (Absolute Maximum Ratings): Updated "Long-term high-temperature storage ..." footnote. ............... 21 • Section 5.2 (ESD Ratings – Commercial): Added section. ................................................................... 22 • Section 5.3 (ESD Ratings – Automotive): Added section. .................................................................... 22 • Section 5.5 (Power Consumption Summary): Changed section title from "Current Consumption" to "Power Consumption Summary". .......................................................................................................... 24 • Table 5-2 (Typical Current Consumption by Various Peripherals (at 150 MHz)): Added footnote about achieving power savings. ...................................................................................................................... 26 • Section 5.6 (Electrical Characteristics): Removed IIL for C281x devices. ................................................... 27 • Section 5.7 (Thermal Resistance Characteristics for 179-Ball ZHH Package): Added section. ......................... 27 • Section 5.8 (Thermal Resistance Characteristics for 179-Ball GHH): Added section. .................................... 27 • Section 5.9 (Thermal Resistance Characteristics for 176-Pin PGF Package): Added section. .......................... 28 • Section 5.10 (Thermal Resistance Characteristics for 128-Pin PBK Package): Added section. ......................... 28 • Section 5.11 (Thermal Design Considerations): Added section. ............................................................. 28 • Section 5.12.2 (Power Supply Sequencing): Changed section title from "Power Sequencing Requirements" to "Power Supply Sequencing". Updated section. Removed "Recommended “Low-Dropout Regulators”" table. Removed C281x data. .............................................................................................................. 31 • Section 5.12.4 (Clock Specifications): Added section title. ................................................................... 37 • Section 5.12.5 (Peripherals): Added section title. .............................................................................. 40 • Figure 5-14 (General-Purpose Input Timing): Replaced "XCLKOUT" with "SYSCLK". .................................... 42 • Section 5.12.5.5 (Serial Peripheral Interface (SPI) Master Mode Timing): Updated section. ............................ 49 • Section 5.12.5.6 (Serial Peripheral Interface (SPI) Slave Mode Timing): Updated section. .............................. 51 • Section 5.12.5.7.2 (Synchronous Mode (USEREADY = 1, READYMODE = 0)): Updated "XTIMING register configuration restrictions" table by changing XRDACTIVE value from " ≥ 1" to "≥ 2" and XWRACTIVE value from " ≥ 1" to "≥ 2". ......................................................................................................................... 54 • Section 5.12.5.7.2 (Synchronous Mode (USEREADY = 1, READYMODE = 0)): Updated "Examples of valid and invalid timing" table by changing Valid XRDACTIVE value from "1" to "2" and Valid XWRACTIVE value from "1" to "2". .................................................................................................................................. 54 • Section 5.12.5.7.3 (Asynchronous Mode (USEREADY = 1, READYMODE = 1)): Updated second "XTIMING register configuration restrictions" table by changing XRDACTIVE value from " ≥ 1" to "≥ 2" and XWRACTIVE value from " ≥ 1" to "≥ 2". ........................................................................................................... 55 • Section 5.12.5.7.3 (Asynchronous Mode (USEREADY = 1, READYMODE = 1)): Updated "Examples of valid and invalid timing" table by changing Valid XRDACTIVE value from "1" to "2" and Valid XWRACTIVE value from "1" to "2". ............................................................................................................................. 55 • Table 5-40 (ADC Absolute Maximum Ratings Over Recommended Operating Conditions (Unless Otherwise Noted)): Updated table. ............................................................................................................ 70 |
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