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TMS320F2810PBKA Datasheet(PDF) 20 Page - Texas Instruments |
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TMS320F2810PBKA Datasheet(HTML) 20 Page - Texas Instruments |
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20 / 173 page ![]() 20 TMS320F2810, TMS320F2811, TMS320F2812 SPRS174U – APRIL 2001 – REVISED JULY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TMS320F2810 TMS320F2811 TMS320F2812 Terminal Configuration and Functions Copyright © 2001–2019, Texas Instruments Incorporated Table 4-1. Signal Descriptions(1) (continued) NAME PIN NO. I/O/Z(2) PU/PD(3) DESCRIPTION 179-BALL GHH/ZHH 176-PIN PGF 128-PIN PBK GPIOF OR XF CPU OUTPUT SIGNAL GPIOF14 - XF_XPLLDIS (O) A11 140 101 I/O PU This pin has three functions: 1. XF – General-purpose output pin. 2. XPLLDIS – This pin is sampled during reset to check whether the PLL must be disabled. The PLL will be disabled if this pin is sensed low. HALT and STANDBY modes cannot be used when the PLL is disabled. 3. GPIO – GPIO function GPIOG OR SCI-B SIGNALS GPIOG4 - SCITXDB (O) P14 90 66 I/O/Z – GPIO or SCI asynchronous serial port transmit data GPIOG5 - SCIRXDB (I) M13 91 67 I/O/Z – GPIO or SCI asynchronous serial port receive data NOTE Other than the power supply pins, no pin should be driven before the 3.3-V rail has reached recommended operating conditions. However, it is acceptable for an I/O pin to ramp along with the 3.3-V supply. |
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