| Electronic Components Datasheet Search |
|
TMS320F2810PBKA Datasheet(PDF) 85 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TMS320F2810PBKA Datasheet(HTML) 85 Page - Texas Instruments |
|
85 / 173 page ![]() PWM (C) TxCTRIP CxTRIP PDPINTx , , (B) XCLKOUT (A) t , t , t w(PDP) w(CxTRIP) w(TxCTRIP) t , t d(PDP-PWM)HZ d(TRIP-PWM)HZ XNMI, XINT1, XINT2 t w(INT) t d(INT) A0-A15 Interrupt Vector 85 TMS320F2810, TMS320F2811, TMS320F2812 www.ti.com SPRS174U – APRIL 2001 – REVISED JULY 2019 Submit Documentation Feedback Product Folder Links: TMS320F2810 TMS320F2811 TMS320F2812 Specifications Copyright © 2001–2019, Texas Instruments Incorporated (1) Input Qualification Time (IQT) = [tc(SCO) × 2 × QUALPRD] × 5 + [tc(SCO) × 2 × QUALPRD]. 5.12.7 Interrupt Timing Table 5-57. Interrupt Switching Characteristics PARAMETER MIN MAX UNIT td(PDP-PWM)HZ Delay time, PDPINTx low to PWM high- impedance state Without input qualifier 12 ns With input qualifier 1tc(SCO) + IQT + 12 (1) td(TRIP-PWM)HZ Delay time, CxTRIP/TxCTRIP signals low to PWM high-impedance state Without input qualifier 3 * tc(SCO) ns With input qualifier 2tc(SCO) + IQT (1) td(INT) Delay time, INT low/high to interrupt-vector fetch IQT + 12tc(SCO) (1) ns (1) Input Qualification Time (IQT) = [tc(SCO) × 2 × QUALPRD] × 5 + [tc(SCO) × 2 × QUALPRD]. Table 5-58. Interrupt Timing Requirements MIN MAX UNIT tw(INT) Pulse duration, INT input low/high With no qualifier 2tc(SCO) cycles With qualifier 1tc(SCO) + IQT (1) tw(PDP) Pulse duration, PDPINTx input low With no qualifier 2tc(SCO) cycles With qualifier 1tc(SCO) + IQT (1) tw(CxTRIP) Pulse duration, CxTRIP input low With no qualifier 2tc(SCO) cycles With qualifier 1tc(SCO) + IQT (1) tw(TxCTRIP) Pulse duration, TxCTRIP input low With no qualifier 2tc(SCO) cycles With qualifier 1tc(SCO) + IQT (1) A. XCLKOUT = SYSCLKOUT B. TxCTRIP – T1CTRIP, T2CTRIP, T3CTRIP, T4CTRIP CxTRIP – C1TRIP, C2TRIP, C3TRIP, C4TRIP, C5TRIP, or C6TRIP PDPINTx – PDPINTA or PDPINTB C. PWM refers to all the PWM pins in the device (that is, PWMn and TnPWM pins or PWM pin pair relevant to each CxTRIP pin). The state of the PWM pins after PDPINTx is taken high depends on the state of the FCOMPOE bit. Figure 5-46. External Interrupt Timing |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |