TMS320F2810PBKA datasheet(15/173 Pages) TI

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TMS320F2810, TMS320F2811, TMS320F2812

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SPRS174U – APRIL 2001 – REVISED JULY 2019

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Terminal Configuration and Functions

Table 4-1. Signal Descriptions(1) (continued)

NAME

PIN NO.

I/O/Z(2)

PU/PD(3)

DESCRIPTION

179-BALL

GHH/ZHH

176-PIN

PGF

128-PIN

PBK

JTAG

TRST

B12

135

JTAG test reset with internal pulldown. TRST,

when driven high, gives the scan system

control of the operations of the device. If this

signal is not connected or driven low, the

device operates in its functional mode, and the

test reset signals are ignored.

NOTE: Do not use pullup resistors on TRST; it

has an internal pulldown device. TRST is an

active-high test pin and must be maintained

low at all times during normal device

operation. In a low-noise environment, TRST

may be left floating. In other instances, an

external pulldown resistor is highly

recommended. The value of this resistor

should be based on drive strength of the

debugger pods applicable to the design. A 2.2-

kΩ resistor generally offers adequate

protection. Since this is application-specific, it

is recommended that each target board be

validated for proper operation of the debugger

and the application.

TCK

A12

136

JTAG test clock with internal pullup

TMS

D13

126

JTAG test-mode select (TMS) with internal

pullup. This serial control input is clocked into

the TAP controller on the rising edge of TCK.

TDI

C13

131

JTAG test data input (TDI) with internal pullup.

TDI is clocked into the selected register

(instruction or data) on a rising edge of TCK.

TDO

D12

127

O/Z

–

JTAG scan out, test data output (TDO). The

contents of the selected register (instruction or

data) is shifted out of TDO on the falling edge

of TCK.

EMU0

D11

137

100

I/O/Z

Emulator pin 0. When TRST is driven high,

this pin is used as an interrupt to or from the

emulator system and is defined as input/output

through the JTAG scan. This pin is also used

to put the device into boundary-scan mode.

With the EMU0 pin at a logic-high state and

the EMU1 pin at a logic-low state, a rising

edge on the TRST pin would latch the device

into boundary-scan mode.

NOTE: An external pullup resistor is

recommended on this pin. The value of this

resistor should be based on the drive strength

of the debugger pods applicable to the design.

A 2.2-kΩ to 4.7-kΩ resistor is generally

adequate. Since this is application-specific, it

is recommended that each target board be

validated for proper operation of the debugger

and the application.

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