26HS01GTAM03 datasheet(35/166 Pages) INFINEON

35 / 166 page

Datasheet

35 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Features

4.3.1

Read

The read operation is performed when the host specifies the READ transaction while CS# is LOW. The device then

provides the data from the memory based on the address. Any number of bytes can be read (burst reads) to

consecutive addresses without issuing a new READ transaction.

For transaction protection, the device performs the CRC over the entire transaction sequence (CS# LOW state)

using the CRC32 polynomial. Once the CS# is brought HIGH, the CRC calculation is stopped and the check-value

latched into the CRC Register. If multiple READ transactions are executed by the host, the device continues

updating the CRC check-value between every CS# LOW cycle.

Figure 23

Read CRC protection

Note Back to back Interface CRC read transaction will not show the CRC checksum value being reset. At the end

of each read interface CRC Register transaction, the interface CRC Register will get reset and updates itself with

new CRC checksum value after getting a transaction with valid input data for at least three clock cycles.

4.3.2

Program / erase

The program operation is performed when the host specifies a program transaction while CS# is LOW. Up to 256

bytes / 512 bytes can be written (burst writes) to consecutive addresses without issuing new program trans-

action. The erase operation is performed when the host specifies an erase transaction while CS# is LOW. Either a

single sector or the complete device can be erased.

For transaction protection, the slave device will perform the CRC over the entire instruction sequence (CS# LOW

state) using the proposed CRC32 polynomial. Once the CS# is brought HIGH to complete the Program / Erase

transaction, the CRC calculation will be stopped and the checksum latched into the CRC Register. If multiple

Program / Erase transactions are executed by the host, the slave will continue updating the CRC checksum

between every CS# LOW cycle.

Figure 24

Program CRC protection

CS#

Command

(16 Bits)

Address

(32 Bits)

Read Data

(n Bits)

DQ[7:0]

Read Transaction

CRC32 - Equation

CRC Read

Every 32-bits of data is shifted into

CRC32 and the Checksum is updated

CS#

Command

(16 Bits)

Address

(32 Bits)

Write Data

(n Bits)

DQ[7:0]

Program Transaction

CRC32 - Equation

CRC Read

Every 32-bits of data is shifted into

CRC32 and the Checksum is updated

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