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26HS01GTAM03 Datasheet(PDF) 43 Page - Infineon Technologies AG |
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26HS01GTAM03 Datasheet(HTML) 43 Page - Infineon Technologies AG |
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43 / 166 page ![]() Datasheet 43 of 166 002-12337 Rev. *Y 2022-01-18 256Mb/512Mb/1Gb SEMPER™ Flash HYPERBUS™ interface, 1.8V/3.0V Features Figure 30 Read password protection scheme flowchart Read password protection notes • Read Password is enabled by programming the ASPR[5] bit to 0. • The command sequence for programming, reading, and locking of the Password for Read Password Method is the same as the default for the PPB Password Method. • When the Read Password mode and Password Protection mode are enabled (i.e., ASPR[2] and ASPR[5] are programmed to 0), then all addresses are redirected to the Boot Sector until the password unlocking sequence is properly entered with the correct password. At which time, the Read Password mode is disabled and all addressing will select the proper location. • If a system Hardware Reset occurs, then the Read Password mode is re-enabled. • ASPR[5] is used to select between Read Password versus PPB Password options. If ASPR[5] = 0 then the device is ready for Read Password. However, Read Password is not enabled until ASPR[2] = 0. At which point, all addresses select only within the top or bottom sectors, until the device is unlocked with the proper unlocking sequence and Password. When ASPR[2] = 1 the addresses select normally. This allows users to program in code, test it, provide a password, and then lock it by programming ASPR[2] = 0. • The Read Password command sequence return undefined results if sent when Read Password Protection is in use. The PPB Lock bit may only be returned to 0 by a Hardware Reset, POR or the PPB Lock bit Clear command sequence. • Only the ID Read command, Password Unlock command and array reads are valid during Read Password mode while the PPB Lock bit = 0. Other commands are disabled until the password is supplied to enable reading of the entire device and normal command operation. |
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