26HS01GTAM03 datasheet(93/166 Pages) INFINEON

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Datasheet

93 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Registers

CFR2N[4]

CFR2V[4]

HYBSEL

Hybrid Burst Selection -

CA[45] must select

Wrapped Burst type for

this option

N => R/W

V => R/W

Description:

The HYBSEL bit selects hybrid burst which provides one initial

wrapped burst followed by a linear burst.

Selection Options:

0 = Hybrid burst is enabled (Wrapped burst followed by linear

burst)

1 = Hybrid burst is disabled

Dependency: N/A

CFR2N[3]

CFR2V[3]

RESVRD

Reserved for Future Use

N => R/W

V => R/W

These bits are Reserved for future use. This bit must always be

written/loaded to its default state.

CFR2N[2]

CFR2V[2]

SP4KBS

Split 4KB Sectors

selection between top

and bottom address

space

N => R/W

V => R/W

Description:

The SP4KBS bit selects whether the 4KB sectors are grouped

together or evenly split between high and low address ranges.

Selection Options:

0 = 4KB Sectors are grouped together

1 = 4KB Sectors are split between High and Low Addresses

Dependency: TB4KBS[1:0] (CFR1x[9:8])

CFR2V[1]

RESVRD

Reserved for Future Use

N => R/W

V => R/W

These bits are Reserved for future use. This bit must always be

written/loaded to its default state.

CFR2N[0]

CFR2V[0]

CK#SEL

Master Clock Selection -

Single Ended or Differ-

ential

N => R/W

V => R/W

Description:

The CK#SEL bit selects whether master clock is single ended

(CK) or differential (CK, CK#)

Selection Options:

1 = Master Clock is single ended (CK)

0 = Master Clock is differential (CK, CK#)

Dependency: N/A

Table 69

Configuration register 2 (x8) (Continued)

Bit number

Name

Function

Read/write

N = Nonvolatile

V = Volatile

Factory

default

(binary)

Description

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