26HS01GTAM03 datasheet(81/166 Pages) INFINEON

81 / 166 page

Datasheet

81 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Features

4.13.2

Write buffer abort (Program abort / DICRC abort)

If an error occurs during a Write to Buffer command, the device (EAC) remains busy. The Status Register shows

ready with valid status bits. The device remains busy until the error status is detected by the host system status

monitoring and the error status is cleared.

During embedded algorithm error status the Status Register will show the following:

• SR[7] = 1; Valid status displayed

• SR[6] = X; May or may not be erase suspended during the WBA error status

• SR[5] = 0; Erase successful

• SR[4] = 1; Programming related error, else = 0

• SR[3] = 1; Write buffer abort

• SR[2] = 0; No Program in suspension

• SR[1] = 0; Sector not locked during operation

• SR[0] = X; Treat as “don’t care” (masked)

When the WBA error status is detected, it is necessary to clear the error status in order to return to normal

operation, ready for a new read or command write. The error status can be cleared by writing:

• Write Buffer Abort Reset command

- Clears the Status Register and returns to normal operation

• Status Register Clear command

Commands that are accepted during embedded algorithm error status are:

• Status Register Read

- Reads the Status Register and returns to WBA busy state

• Write Buffer Abort Reset command

• Status Register Clear command

During an embedded algorithm, read transactions not associated with a Status Register Read will toggle DS and

return indeterminate data.

4.14

Error typer and reporting - Legacy (x1) SPI

There are two types of errors reported by the embedded operation status methods. Depending on the error type,

the status reported and procedure for clearing the error status is different.

Table 60 and Table 61 provide the details for clearing the error status.

Table 60

Program error (PRGERR) summary

Error Flag

Symbol

Conditions

Program Error

PRGERR

Bits cannot be programmed ‘1’ to ‘0’

Trying to program in a protected region

If ASP0[2] or ASP0[1] is 0, any Nonvolatile Register write attempting to change the value of CFR1N[6:2]/CFR1V[6:2]

After the Password Protection Mode is selected and ASP Password Register update transaction executed

SafeBoot Failure

Configuration Failure

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