26HS01GTAM03 datasheet(95/166 Pages) INFINEON

95 / 166 page

Datasheet

95 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Registers

STRV[3]

WRBFAB

Write Buffer Abort

Status Flag

V => R

Description:

The WRBFAB bit indicates a programming abort condition.

When any condition causes an abort of write buffer

instruction, the abort will happen immediately after the

offending condition, and will indicate a Program Fail in the

Status Register (PRGERR = 1) along with a Write Buffer Abort

(WRBFAB = 1). The next successful program operation will

clear the failure status or a Clear Status Register may be

issued to clear the PSB status bit.

The WRBFAB also indicates that the memory array CRC calcu-

lation operation was aborted. The Ending Address (EA)

should be at least one address higher than the Starting

Address (SA). If EA < SA + 1 the Checkvalue Calculation will

abort and the device will return to the Ready state. WRBFAB

will be set (1) to indicate the aborted condition. If EA < SA + 1

the CRCR will hold indeterminate data.

Selection Options:

0 = Program did not abort during write to buffer instruction

or CRC end address load instruction did not abort

1 = Program aborted during write to buffer instruction or CRC

end address load instruction aborted

Dependency: N/A

STRV[2]

PROGMS

Program operation

Suspend Status Flag

V => R

Description:

The PROGMS bit is used to indicate if the Program operation

is suspended.

Selection Options:

0 = Program operation is not in suspend mode

1 = Program operation is in suspend mode

Dependency: N/A

STRV[1]

SPROTE

Sector Protection

(Lock) Error Flag

V => R

Description:

The SPROTE bit indicates that a program or erase operation

failed because the target region (memory array, registers or

SSR) was protected (locked). SPROTE reflects the status of

the most recent program or erase operation.

Selection Options:

0 = Operation did not generate a Protection error

1 = Operation generated a Protection error

Dependency: N/A

STRV[0]

SESTAT

Sector Erase

Success/Failure Status

Flag

V => R

Description:

The SESTAT bit indicates whether the erase operation on the

sector completed successfully. Evaluate Erase Status trans-

action (EVERS_4_0) must be executed prior to reading

SESTAT bit which specifies the sector address.

Selection Options:

0 = Addressed sector was not erased successfully

1 = Addressed sector was erased successfully

Dependency: N/A

Table 70

Status register (x8)[24] (Continued)

Bit number

Name

Function

Read/write

N = Nonvolatile

V = Volatile

Factory

default

(binary)

Description

Note

24. STRV value during POR, Hardware Reset, DPD Exit, and CS# Signaling Reset is not valid.

26HS01GTAM03 Datasheet(PDF) 95 Page - Infineon Technologies AG

26HS01GTAM03 Datasheet(HTML) 95 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL