26HS01GTAM03 datasheet(75/166 Pages) INFINEON

75 / 166 page

Datasheet

75 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Features

4.11.6

Erase 256KB sector transaction

The Erase 256KB Sector (ER256_4_0) transaction sets all bits in the addressed sector to 1 (all bytes are FFh).

A device configuration option (CFR3V[3]) determines if the Hybrid Sector Architecture is in use. When CFR3V[3] =

0, 4KB sectors overlay a portion of the highest or lowest address 128KB or 64KB of the device address space. If a

sector erase command is applied to a 256KB sector that is overlaid by 4KB sectors, the overlaid 4KB sectors are

not affected by the erase. Only the visible (non-overlaid) portion of the 128KB or 192KB sector is erased. When

CFR3V[3] = 1, there are no 4KB sectors in the device address space and the Sector Erase command always

operates on fully visible 256KB sectors.

When BLKCHK is enabled an erase transaction first evaluates the erase status of the sector. If the sector is found

to erased, the erase operation is aborted. The erase operation is only executed if programmed bits are found in

the sector. Disabling BLKCHK executes an erase operation unconditionally.

4.11.7

Erase chip transaction

The Erase Chip (ERCHP_0_0) transaction sets all bits to 1 (all bytes are FFh) inside the entire flash memory array.

An Erase Chip transaction can be executed only when the Block Protection (BP2, BP1, BP0) bits are set to 0’s. If

the BP bits are not zero, the transaction is not executed and ERSERR status fail bit is not set. The transaction will

skip any sectors protected by the Advance Sector Protection DYB or PPB and the ERSERR status fail bit will not

be set.

4.11.8

Erase persistent protection bit (PPB) transaction

The Erase PPB transaction sets all PPB bits to 1. This transaction will abort if PPB bits are protected by ASPPPB

(ASPO[3]), ASPPRM (ASPO[0]) and PPBLCK (PPLV[0]) bit.

4.11.9

Erase status and count

4.11.9.1

Evaluate erase status transaction

The Evaluate Erase Status (EVERS_4_0) transaction verifies that the last erase operation on the addressed sector

was completed successfully. If the selected sector was successfully erased, then the erase status bit (STR2V[2]) is

set to 1. If the selected sector was not completely erased STR2V[2] is 0. The Write/Program Enable transaction (to

set the WRPGEN bit) is not required before this transaction. However, the RDYBSY bit is set by the device itself

and cleared at the end of the operation, as visible in STR1V[0] when reading status.

The Evaluate Erase Status transaction can be used to detect when erase operations that have failed due to loss

of power, reset, or failure during the erase operation. The transaction requires tEES to complete and update the

erase status in STR2V. The RDYBSY bit (STR1V[0]) can be read to determine when the Evaluate Erase Status trans-

action is completed. If a sector is found not erased with STR2V[2] = 0, the sector must be erased again to ensure

reliable storage of data in the sector.

4.11.9.2

Sector erase count transaction

The Sector Erase Count (SEERC_4_0) transaction outputs the number of erase cycles for the addressed sector.

The erase cycle count is stored in Sector Erase Count (SECV[22:0]) Register, and can be read by using the Read

Any Register transaction (RDARG_4_0). The RDYBSY bit is set by the device itself and cleared at the end of the

operation, as visible in STR1V[0] when reading status.

The transaction requires tSEC to complete and update the SECV[22:0] Register. The RDYBSY bit (STR1V[0]) may be

read, to determine when the Sector Erase Count Transaction is finished. The SECV[23] bit is used to determine if

the reported sector erase count is corrupted and was reset.

26HS01GTAM03 Datasheet(PDF) 75 Page - Infineon Technologies AG

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