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26HS01GTAM03 Datasheet(PDF) 96 Page - Infineon Technologies AG

Part # 26HS01GTAM03
Description  256Mb/512Mb/1Gb SEMPER??Flash HYPERBUS??interface, 1.8V/3.0V
PDF  166 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

26HS01GTAM03 Datasheet(HTML) 96 Page - Infineon Technologies AG

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002-12337 Rev. *Y
2022-01-18
256Mb/512Mb/1Gb SEMPER™ Flash
HYPERBUS™ interface, 1.8V/3.0V
Registers
5.2.4
ECC status register (ECSV) (x8)
The ECC Status (ECSV) contains the ECC status of any error correction action performed on the unit data.
5.2.5
ECC address trap register (EATV) (x8)
The ECC Address Trap Register (EATV) stores the address of the ECC unit data where either a 1-Bit/2-Bit error or
only a 1-Bit error occurred during a read operation. It stores the ECC unit address of the first ECC error.
Table 71
ECC status register (x8)
Bit number
Name
Function
Read/write
N = Nonvolatile
V = Volatile
Factory
default
(binary)
Description
ECSV[15:4]
RESRVD
Reserved for Future Use
V => R
000000000000 This bit is Reserved for future use.
This bit must always be written/loaded to its default state.
ECSV[3]
ECC2BT
ECC Error 2-bit Error
Detection Flag
V => R
0
Description: The ECC2BT bit indicates that a 2-bit ECC Error
was detected in the data unit (16 bytes).
Selection Options:
0 = No 2-Bit ECC Error was detected in the data unit (16 bytes)
1 = 2-bit ECC Error was detected in the data unit (16 bytes)
Dependency: N/A
ECSV[2]
RESVRD
Reserved for Future Use
V => R
0
This bit is Reserved for future use. This bit must always be
written/loaded to its default state.
ECSV[1]
ECC1BT
ECC Error 1-bit Error
Detection and
Correction Flag
V => R
0
Description: The ECC1BT bit indicates that a 1-bit ECC Error
was detected and corrected in the data unit (16 bytes).
Selection Options:
0 = No 1-Bit ECC Error was detected in the data unit (16 bytes)
1 = 1-bit ECC Error was detected in the data unit (16 bytes)
Dependency: N/A
ECSV[0]
ECCDBL
ECC Disable Flag
V => R
0
Description: The ECCDBL bit indicates whether the ECC is
enabled or disabled in the addressed data unit (16 bytes).
Selection Options:
0 = ECC is enabled in the addressed data unit (16 bytes)
1 = ECC is disabled in the addressed data unit (16 bytes)
Dependency: N/A
Table 72
ECC address trap register (x8)
Bit number
Name
Function
Read/write
N = Nonvolatile
V = Volatile
Factory
default
(binary)
Description
EATV[31:0]
ECCATP[31:0]
ECC 1-bit and 2-bit Error
Address Trap Register
V => R
0x00000000
Description: The Address Trap Register (ECCATP[31:0])
stores the ECC unit data address where a 1-Bit/2-Bit
error occurred during a read operation. ECCATP[31:0]
stores the ECC unit address of the first ECC error
captured during a memory read operation since the last
Clear ECC Status Register transaction (CLECC).
Note ECCATP[31:0] is only updated during Read
Instruction.
Note Mask non-valid upper ECCATP address bits from
ECC unit address.
Note Clear ECC Status Register transaction (CLECC),
POR or Hardware/Software reset clears the EATV[31:0]
to 0x00000000.
Selection Options: ECC Error Data Unit Address
Dependency: N/A+F6:F20



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