R5F72115D160FPV datasheet(473/1228 Pages) RENESAS

Part #	R5F72115D160FPV

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family

PDF	1228 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 May. 08, 2008 Page 449 of 1200

REJ09B0344-0200

• When TGR is an input capture register

When input capture occurs, the value in TCNT is transferred to TGR and the value previously

held in the timer general register is transferred to the buffer register.

This operation is illustrated in figure 10.15.

Buffer

Timer general

TCNT

Input capture

signal

Figure 10.15 Input Capture Buffer Operation

(1)

Example of Buffer Operation Setting Procedure

Figure 10.16 shows an example of the buffer operation setting procedure.

Buffer operation

Select TGR function

Set buffer operation

Start count

[1]

[2]

[3]

[1] Designate TGR as an input capture register or

output compare register by means of TIOR.

[2] Designate TGR for buffer operation with bits

BFA and BFB in TMDR.

[3] Set the CST bit in TSTR to 1 start the count

operation.

Figure 10.16 Example of Buffer Operation Setting Procedure

R5F72115D160FPV Datasheet(PDF) 473 Page - Renesas Technology Corp