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R5F72115D160FPV Datasheet(PDF) 203 Page - Renesas Technology Corp

Part # R5F72115D160FPV
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family
PDF  1228 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F72115D160FPV Datasheet(HTML) 203 Page - Renesas Technology Corp

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Section 8 Bus State Controller (BSC)
Rev. 2.00 May. 08, 2008 Page 179 of 1200
REJ09B0344-0200
8.3
Area Overview
8.3.1
Address Map
In the architecture, this LSI has a 32-bit address space, which is divided into external address
space and on-chip spaces (on-chip ROM, on-chip RAM, on-chip peripheral modules, and reserved
areas) according to the upper bits of the address.
The kind of memory to be connected and the data bus width are specified in each partial space.
The address map for the external address space is listed below.
Table 8.2
Address Map in On-Chip ROM-Enabled Mode
Address
Space
Memory to be Connected
Size
H'0000 0000 to H'0007 FFFF
On-chip ROM
On-chip ROM
512 Kbytes
H'0008 0000 to H'01FF FFFF
Other
Reserved area
⎯
H'0200 0000 to H'03FF FFFF
CS0
Normal space, SRAM with byte selection,
burst ROM (asynchronous or synchronous)
32 Mbytes
H'0400 0000 to H'07FF FFFF
CS1
Normal space, SRAM with byte selection
64 Mbytes
H'0800 0000 to H'0BFF FFFF
CS2
Normal space, SRAM with byte selection,
SDRAM
64 Mbytes
H'0C00 0000 to H'0FFF FFFF
CS3
Normal space, SRAM with byte selection,
SDRAM
64 Mbytes
H'1000 0000 to H'13FF FFFF
CS4
Normal space, SRAM with byte selection,
burst ROM (asynchronous)
64 Mbytes
H'1400 0000 to H'17FF FFFF
CS5
Normal space, SRAM with byte selection,
MPX-I/O
64 Mbytes
H'1800 0000 to H'1BFF FFFF
CS6
Normal space, SRAM with byte selection
64 Mbytes
H'1C00 0000 to H'1FFF FFFF
CS7
Normal space, SRAM with byte selection
64 Mbytes
H'2000 0000 to H'FFF7 FFFF
Other
Reserved area
⎯
H'FFF8 0000 to H'FFFB FFFF
Other
On-chip RAM, reserved area*
⎯
H'FFFC 0000 to H'FFFF FFFF
Other
On-chip peripheral modules, reserved area*
⎯
Note:
*
For the on-chip RAM space, access the addresses shown in section 22, On-Chip RAM.
For the on-chip peripheral module space, access the addresses shown in section 26,
List of Registers. Do not access addresses which are not described in these sections.
Otherwise, the correct operation cannot be guaranteed.



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