R5F72115D160FPV datasheet(212/1228 Pages) RENESAS

212 / 1228 page

Section 8 Bus State Controller (BSC)

Rev. 2.00 May. 08, 2008 Page 188 of 1200

REJ09B0344-0200

Bit

Bit Name

Initial

Value

R/W

Description

24 to 22

IWRWS[2:0] 011

R/W

Idle Cycles for Read-Write in the Same Space

Specify the number of idle cycles to be inserted after

the access to a memory that is connected to the

space. The target cycle is a read-write cycle of which

continuous access cycles are for the same space.

000: No idle cycle inserted

001: 1 idle cycle inserted

010: 2 idle cycles inserted

011: 4 idle cycles inserted

100: 6 idle cycles inserted

101: 8 idle cycles inserted

110: 10 idle cycles inserted

111: 12 idle cycles inserted

21 to 19

IWRRD[2:0]

011

R/W

Idle Cycles for Read-Read in Another Space

Specify the number of idle cycles to be inserted after

the access to a memory that is connected to the

space. The target cycle is a read-read cycle of which

continuous access cycles switch between different

space.

000: No idle cycle inserted

001: 1 idle cycle inserted

010: 2 idle cycles inserted

011: 4 idle cycles inserted

100: 6 idle cycles inserted

101: 8 idle cycles inserted

110: 10 idle cycles inserted

111: 12 idle cycles inserted

R5F72115D160FPV Datasheet(PDF) 212 Page - Renesas Technology Corp

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