R5F72115D160FPV datasheet(247/1228 Pages) RENESAS

247 / 1228 page

Section 8 Bus State Controller (BSC)

Rev. 2.00 May. 08, 2008 Page 223 of 1200

REJ09B0344-0200

Bit

Bit Name

Initial

Value

R/W

Description

RMODE

R/W

Refresh Control

Specifies whether to perform auto-refresh or self-

refresh when the RFSH bit is 1. When the RFSH bit is

1 and this bit is 1, self-refresh starts immediately.

When the RFSH bit is 1 and this bit is 0, auto-refresh

starts according to the contents that are set in registers

RTCSR, RTCNT, and RTCOR.

0: Auto-refresh is performed

1: Self-refresh is performed

PDOWN

Power-Down Mode

Specifies whether the SDRAM will enter power-down

mode after the access to the SDRAM. With this bit

being set to 1, after the SDRAM is accessed, the CKE

signal is driven low and the SDRAM enters power-

down mode.

0: The SDRAM does not enter power-down mode after

being accessed.

1: The SDRAM enters power-down mode after being

accessed.

BACTV

R/W

Bank Active Mode

Specifies to access whether in auto-precharge mode

(using READA and WRITA commands) or in bank

active mode (using READ and WRIT commands).

0: Auto-precharge mode (using READA and WRITA

commands)

1: Bank active mode (using READ and WRIT

commands)

Note:

Bank active mode can be set only in area 3,

and only the 16-bit bus width can be set. When

both the CS2 and CS3 spaces are set to

SDRAM, specify auto-precharge mode.

7 to 5

⎯

All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

R5F72115D160FPV Datasheet(PDF) 247 Page - Renesas Technology Corp

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