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R5F72115D160FPV Datasheet(PDF) 248 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 248 Page - Renesas Technology Corp |
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248 / 1228 page ![]() Section 8 Bus State Controller (BSC) Rev. 2.00 May. 08, 2008 Page 224 of 1200 REJ09B0344-0200 Bit Bit Name Initial Value R/W Description 4, 3 A3ROW[1:0] 00 R/W Number of Bits of Row Address for Area 3 Specify the number of bits of the row address for area 3. 00: 11 bits 01: 12 bits 10: 13 bits 11: Reserved (setting prohibited) 2 ⎯ 0 R Reserved This bit is always read as 0. The write value should always be 0. 1, 0 A3COL[1:0] 00 R/W Number of Bits of Column Address for Area 3 Specify the number of bits of the column address for area 3. 00: 8 bits 01: 9 bits 10: 10 bits 11: Reserved (setting prohibited) |
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