EP4CE40 datasheet(199/488 Pages) ALTERA

199 / 488 page

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices

8–35

Configuration

May 2013

Altera Corporation

Cyclone IV Device Handbook,

Volume 1

After the first device completes configuration in a multi-device configuration chain,

its nCEO pin drives low to activate the nCE pin of the second device, which prompts the

second device to begin configuration. The second device in the chain begins

configuration in one clock cycle. Therefore, the transfer of data destinations is

transparent to the external host device. nCONFIG, nSTATUS, DCLK, DATA[0], and

CONF_DONE

configuration pins are connected to every device in the chain. To ensure

signal integrity and prevent clock skew problems, configuration signals may require

buffering. Ensure that DCLK and DATA lines are buffered. All devices initialize and enter

user mode at the same time because all CONF_DONE pins are tied together.

If any device detects an error, configuration stops for the entire chain and you must

reconfigure the entire chain because all nSTATUS and CONF_DONE pins are tied together.

For example, if the first device flags an error on nSTATUS, it resets the chain by pulling

its nSTATUS pin low. This behavior is similar to a single device detecting an error.

You can have multiple devices that contain the same configuration data in your

system. To support this configuration scheme, all device nCE inputs are tied to GND,

while the nCEO pins are left floating. nCONFIG, nSTATUS, DCLK, DATA[0], and CONF_DONE

configuration pins are connected to every device in the chain. To ensure signal

integrity and prevent clock skew problems, configuration signals may require

buffering. Ensure that the DCLK and DATA lines are buffered. Devices must be of the

same density and package. All devices start and complete configuration at the same

time.

Figure 8–15 shows a multi-device PS configuration when both Cyclone IV devices are

receiving the same configuration data.

Figure 8–15. Multi-Device PS Configuration When Both Devices Receive the Same Data

Notes to Figure 8–15:

(1) You must connect the pull-up resistor to a supply that provides an acceptable input signal for all devices in the chain.

VCC must be high enough to meet the VIH specification of the I/O on the device and the external host.

(2) The nCEO pins of both devices are left unconnected or used as user I/O pins when configuring the same configuration

data into multiple devices.

(3) The MSEL pin settings vary for different configuration voltage standards and POR time. To connect the MSEL pins,

refer to Table 8–3 on page 8–8, Table 8–4 on page 8–8, and Table 8–5 on page 8–9. Connect the MSEL pins directly

to VCCA or GND.

(4) All I/O inputs must maintain a maximum AC voltage of 4.1 V. DATA[0] and DCLK must fit the maximum overshoot

outlined in Equation 8–1 on page 8–5.

External Host

(MAX II Device or

Microprocessor)

Memory

ADDR

Cyclone IV Master Device

nSTATUS

CONF_DONE

nCE

nCEO

DATA[0]

GND

MSEL[ ]

DATA[0]

(4)

nCONFIG

DCLK

(4)

nSTATUS

CONF_DONE

nCE

nCEO

N.C. (2)

DATA[0]

(4)

nCONFIG

DCLK

(4)

Cyclone IV Slave Device

N.C. (2)

GND

(3)

MSEL[ ]

(3)

Buffers (4)

10 k



VCCIO (1) VCCIO (1)

10 k



EP4CE40 Datasheet(PDF) 199 Page - Altera Corporation

EP4CE40 Datasheet(HTML) 199 Page - Altera Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL