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EP4CE40 Datasheet(PDF) 209 Page - Altera Corporation

Part # EP4CE40
Description  Cyclone IV Device Handbook, Volume 1
PDF  488 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP4CE40 Datasheet(HTML) 209 Page - Altera Corporation

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Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
8–45
Configuration
May 2013
Altera Corporation
Cyclone IV Device Handbook,
Volume 1
JTAG Configuration
JTAG has developed a specification for boundary-scan testing (BST). The BST
architecture offers the capability to efficiently test components on PCBs with tight
lead spacing. The BST architecture can test pin connections without using physical
test probes and capture functional data while a device is normally operating. You can
also use the JTAG circuitry to shift configuration data into the device. The Quartus II
software automatically generates .sof for JTAG configuration with a download cable
in the Quartus II software Programmer.
tCF2ST1
nCONFIG
high to
nSTATUS
high
—
230 (4)
µs
tCF2CK
nCONFIG
high to
first rising edge on
DCLK
230 (3)
—µs
tST2CK
nSTATUS
high to
first rising edge of
DCLK
2—
µs
tDH
Data hold time after
rising edge on
DCLK
0—
ns
tCD2UM
CONF_DONE
high to
user mode (5)
300
650
µs
tCD2CU
CONF_DONE
high to
CLKUSR
enabled
4 × maximum DCLK period
—
—
tCD2UMC
CONF_DONE
high to
user mode with
CLKUSR option on
tCD2CU + (3,192 × CLKUSR period)
——
tDSU
Data setup time
before rising edge
on DCLK
58—
—
ns
tCH
DCLK
high time
3.2
6.4
—
—
ns
tCL
DCLK
low time
3.2
6.4
—
—
ns
tCLK
DCLK
period
7.5
15
—
—
ns
fMAX
DCLK
frequency (6)
—
—
133
66
MHz
Notes to Table 8–13:
(1) Applicable for Cyclone IV GX and Cyclone IV E with 1.2-V core voltage.
(2) Applicable for Cyclone IV E with 1.0-V core voltage.
(3) This value is applicable if you do not delay configuration by extending the nCONFIG or nSTATUS low pulse width.
(4) This value is applicable if you do not delay configuration by externally holding the nSTATUS low.
(5) The minimum and maximum numbers apply only if you choose the internal oscillator as the clock source for starting the device.
(6) Cyclone IV E devices with 1.0-V core voltage have slower FMAX when compared with Cyclone IV GX devices with 1.2-V core voltage.
Table 8–13. FPP Timing Parameters for Cyclone IV Devices (Part 2 of 2)
Symbol
Parameter
Minimum
Maximum
Unit
Cyclone IV (1)
Cyclone IV E (2)
Cyclone IV (1)
Cyclone IV E (2)



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