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26HS01GTAM03 Datasheet(PDF) 127 Page - Infineon Technologies AG |
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26HS01GTAM03 Datasheet(HTML) 127 Page - Infineon Technologies AG |
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127 / 166 page  Datasheet 127 of 166 002-12337 Rev. *Y 2022-01-18 256Mb/512Mb/1Gb SEMPER™ Flash HYPERBUS™ interface, 1.8V/3.0V Transaction table ECCENT_3_1 ASO Error Correction Codes Error Correction (ECC) ASO Entry transaction allows accessing the error correction action (ECC status) of any half-page of the Flash Memory Array. 3 RDECST_1_1 Read Error Correction (ECC) Status transaction provides the ECC Status value for the addressed half-page on DQ[7:0]. A single word of status is displayed at any word location within a half-page. 1 RDADTL_2_1 Read Address Trap Register Lower Word transaction provides the lower 16-bits of the error correction action (ECC) related address value stored in the Address Trap Register (32-bits) on DQ[7:0]. 2 RDADTU_2_1 Read Address Trap Register Upper Word transaction provides the upper 16-bits of the error correction action (ECC) related address value stored in the Address Trap Register (32-bits) on DQ[7:0]. 2 RDCONT_2_1 Read ECC Count Value Register transaction provides the ECC count of th number of error correction actions on DQ[7:0]. 2 CLRECC_1_1 Clear ECC Error Status Failure Flags transaction resets all failure flags and inter- rupts being reported. 1 ASOEXT_1_1 ASO Exit transaction returns the device to reading memory array data mode when device is in an ASO. If any of the ASO Entry commands were issued, an ASO Exit command must be issued to reset the device into Read mode. 1 ICRCEN_3_1 ASO Interface CRC Interface CRC Register ASO Entry transaction allows accessing the contents of the Interface CRC Register. Exiting Interface CRC Register ASO clears the Interface CRC Register. 3 RDICRC_1_1 Read Volatile Interface CRC Register transaction provides the contents of the Interface CRC Register on DQ[7:0]. Addresses 0x00 and 0x01 define the lower and upper 16-bit Interface CRC Register values. 1 ASOEXT_1_1 ASO Exit transaction returns the device to reading memory array data mode when device is in an ASO. If any of the ASO Entry commands were issued, an ASO Exit command must be issued to reset the device into Read mode. 1 DICREN_3_1 ASO Data Integrity CRC Data Integrity CRC Register ASO Entry transaction allows accessing the Data Integrity CRC check-value. While the Data Integrity CRC calculation is not suspended the Data Integrity CRC ASO overlays the entire flash memory array. When the CRC calculation is suspended the flash memory array is visible for reading. 3 LDSTAD_1_1 Load Start Address transaction loads the Data Integrity CRC beginning address location. 1 LDENAD_1_1 Load End Address transaction loads the Data Integrity CRC ending address location. 1 SP_DIC_1_1 Suspend Data Integrity CRC transaction allows the system to interrupt the Data Integrity CRC calculation operation. 1 RDCMRY_1_1 Read Memory Array during Data Integrity CRC suspend transaction allows reading out the memory array data at the given address and places it on DQ[7:0]. 1 RS_DIC_1_1 Resume Data Integrity CRC transaction allows the system to resume the suspended Data Integrity CRC calculation operation. 1 RDDICL_2_1 Read Data Integrity CRC Register Lower Word transaction provides the lower 16-bits of the Data Integrity CRC check-value on DQ[7:0]. 2 RDDICU_2_1 Read Data Integrity CRC Register Upper Word transaction provides the upper 16-bits of the Data Integrity CRC check-value on DQ[7:0]. 2 ASOEXT_1_1 ASO Exit transaction returns the device to reading memory array data mode when device is in an ASO. If any of the ASO Entry commands were issued, an ASO Exit command must be issued to reset the device into Read mode. 1 ATBNEN_3_1 ASO AutoBoot AutoBoot Nonvolatile Register ASO Entry transaction allows accessing the AutoBoot Register. This entry transaction does not use a sector address from the entry transaction. 3 PGNATB_2_1 Program Nonvolatile AutoBoot Register transaction programs the programs the 16-bit Nonvolatile AutoBoot Register with data placed on DQ[7:0]. 2 RDATBN_1_0 Read Nonvolatile AutoBoot Register transaction allows reading the contents of the 32-bit Nonvolatile AutoBoot Register and places it on DQ[7:0]. Addresses 0x00 and 0x01 define the lower and upper 16-bit AutoBoot Register values. 1 ASOEXT_1_1 ASO Exit transaction returns the device to reading memory array data mode when device is in an ASO. If any of the ASO Entry commands were issued, an ASO Exit command must be issued to reset the device into Read mode. 1 Table 120 HYPERBUS™ transaction description (Continued) Transaction name Description Cycles |
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