DP83936AVF datasheet(24/104 Pages) NSC

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50 Buffer Management

51 BUFFER MANAGEMENT OVERVIEW

The SONIC-T’s buffer management scheme is based on

separate buffers and descriptors (

Figures 5-3 and 5-12 )

Packets that are received or transmitted are placed in buff-

ers called the Receive Buffer Area (RBA) and the Transmit

Buffer Area (TBA) The system keeps track of packets in

these buffers using the information in the Receive Descrip-

tor Area (RDA) and the Transmit Descriptor Area (TDA) A

single (TDA) points to a single TBA but multiple RDAs can

point to a single RBA (one RDA per packet in the buffer)

The Receive Resource Area (RRA) which is another form

of descriptor is used to keep track of the actual buffer

When packets are transmitted the system sets up the pack-

ets in one or more TBAs with a TDA pointing to each TBA

There can only be one packet per TBATDA pair A single

TBA however may be made up of several fragments of

data dispersed in memory There is one TDA pointing to

each TBA which specifies information about the buffer’s

size location in memory number of fragments and status

after transmission The TDAs are linked together in a linked

list The system causes the SONIC-T to transmit the pack-

ets by passing the first TDA to the SONIC-T and issuing the

transmit command

Before a packet can be received an RDA and RBA must be

set up by the system RDAs are made up as a linked list

similar to TDAs An RDA is not linked to a particular RBA

though Instead an RDA is linked specifically to a packet

after it has been buffered into an RBA More than one pack-

et can be buffered into the same RBA but each packet gets

its own RDA A received packet can not be scattered into

fragments The system only needs to tell the SONIC-T

where the first RDA and where the RDAs are Since an RDA

never specifically points to an RBA the RRA is used to

keep track of the RBAs The RRA is a circular queue of

pointers and buffer sizes (not a linked list) When the

SONIC-T receives a packet it is buffered into an RBA and a

unique corresponding RDA is written to so that it points to

and describes the new packet If the RBA does not have

enough space to buffer the next packet a new RBA is ob-

tained from the RRA

52 DESCRIPTOR AREAS

Descriptors are the basis of the buffer management scheme

used by the SONIC-T An RDA points to a received packet

within an RBA an RRA points to an RBA and a TDA points

to a TBA which contains a packet to be transmitted The

conventions and registers used to describe these descrip-

tors are discussed in the next three sections

521 Naming Convention for Descriptors

The fields which make up the descriptors are named in a

consistent manner to assist in remembering the usage of

each descriptor Each descriptor name consists of three

components in the following format

RXTX descriptor name

field

The first two capital letters indicate whether the descriptor is

used for transmission (TX) or reception (RX) and is then

followed by the descriptor name having one of two names

rsrc e Resource descriptor

pkt e Packet descriptor

The last component consists of a field name to distinguish it

from the other fields of a descriptor The field name is sepa-

rated from the descriptor name by a period (‘‘’’) An exam-

ple of a descriptor is shown in

Figure 5-1

TLF12597 – 88

FIGURE 5-1 Receive Buffer Descriptor Example

522 Abbreviations

Abbreviations are used to describe the SONIC-T registers

and data structures in memory The ‘‘0’’ and ‘‘1’’ in the ab-

breviations indicate the least and most significant portions

of the registers or descriptors Table 5-1 lists the naming

convention abbreviations for descriptors

523 Buffer Management Base Addresses

The SONIC-T uses three areas in memory to store descrip-

tor information the Transmit Descriptor Area (TDA) the Re-

ceive Descriptor Area (RDA) and the Receive Resource

Area (RRA) The SONIC-T accesses these areas by concat-

enating a 16-bit base address register with a 16-bit offset

16 bits of address and the offset registers provide the lower

16 bits of address The base address registers are the Up-

per Transmit Descriptor Address (UTDA) Upper Receive

Descriptor Address (URDA) and the Upper Receive Re-

source Address (URRA) registers The corresponding offset

registers are shown below

Upper Address Registers

Offset Registers

URRA

RSAREARWPRRP

URDA

CRDA

UTDA

CTDA

Table 5-1 defines the register mnemonics

Figure 5-2 shows an example of the Transmit Descriptor

Area and the Receive Descriptor Area being located by the

UTDA and URDA registers The descriptor areas RDA

TDA and RRA are allowed to have the same base address

ie URRAeURDAeUTDA Care however must be taken

to prevent these areas from overwriting each other

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